Lines Matching refs:OpcodeIndex
2135 unsigned OpcodeIndex; in SelectVLD() local
2139 case MVT::v8i8: OpcodeIndex = 0; break; in SelectVLD()
2142 case MVT::v4i16: OpcodeIndex = 1; break; in SelectVLD()
2144 case MVT::v2i32: OpcodeIndex = 2; break; in SelectVLD()
2145 case MVT::v1i64: OpcodeIndex = 3; break; in SelectVLD()
2147 case MVT::v16i8: OpcodeIndex = 0; break; in SelectVLD()
2150 case MVT::v8i16: OpcodeIndex = 1; break; in SelectVLD()
2152 case MVT::v4i32: OpcodeIndex = 2; break; in SelectVLD()
2154 case MVT::v2i64: OpcodeIndex = 3; break; in SelectVLD()
2179 unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] : in SelectVLD()
2180 QOpcodes0[OpcodeIndex]); in SelectVLD()
2212 SDNode *VLdA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl, in SelectVLD()
2230 VLd = CurDAG->getMachineNode(QOpcodes1[OpcodeIndex], dl, ResTys, Ops); in SelectVLD()
2280 unsigned OpcodeIndex; in SelectVST() local
2284 case MVT::v8i8: OpcodeIndex = 0; break; in SelectVST()
2287 case MVT::v4i16: OpcodeIndex = 1; break; in SelectVST()
2289 case MVT::v2i32: OpcodeIndex = 2; break; in SelectVST()
2290 case MVT::v1i64: OpcodeIndex = 3; break; in SelectVST()
2292 case MVT::v16i8: OpcodeIndex = 0; break; in SelectVST()
2295 case MVT::v8i16: OpcodeIndex = 1; break; in SelectVST()
2297 case MVT::v4i32: OpcodeIndex = 2; break; in SelectVST()
2299 case MVT::v2i64: OpcodeIndex = 3; break; in SelectVST()
2338 unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] : in SelectVST()
2339 QOpcodes0[OpcodeIndex]); in SelectVST()
2385 SDNode *VStA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl, in SelectVST()
2405 SDNode *VStB = CurDAG->getMachineNode(QOpcodes1[OpcodeIndex], dl, ResTys, in SelectVST()
2449 unsigned OpcodeIndex; in SelectVLDSTLane() local
2453 case MVT::v8i8: OpcodeIndex = 0; break; in SelectVLDSTLane()
2456 case MVT::v4i16: OpcodeIndex = 1; break; in SelectVLDSTLane()
2458 case MVT::v2i32: OpcodeIndex = 2; break; in SelectVLDSTLane()
2462 case MVT::v8i16: OpcodeIndex = 0; break; in SelectVLDSTLane()
2464 case MVT::v4i32: OpcodeIndex = 1; break; in SelectVLDSTLane()
2516 unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] : in SelectVLDSTLane()
2517 QOpcodes[OpcodeIndex]); in SelectVLDSTLane()
2986 unsigned OpcodeIndex; in SelectVLDDup() local
2990 case MVT::v16i8: OpcodeIndex = 0; break; in SelectVLDDup()
2997 OpcodeIndex = 1; break; in SelectVLDDup()
3001 case MVT::v4i32: OpcodeIndex = 2; break; in SelectVLDDup()
3003 case MVT::v1i64: OpcodeIndex = 3; break; in SelectVLDDup()
3023 unsigned Opc = is64BitVector ? DOpcodes[OpcodeIndex] in SelectVLDDup()
3024 : (NumVecs == 1) ? QOpcodes0[OpcodeIndex] in SelectVLDDup()
3025 : QOpcodes1[OpcodeIndex]; in SelectVLDDup()
3045 SDNode *VLdA = CurDAG->getMachineNode(QOpcodes0[OpcodeIndex], dl, ResTy, in SelectVLDDup()