Lines Matching refs:MBBI
64 MachineBasicBlock::iterator MBBI,
67 void ExpandVLD(MachineBasicBlock::iterator &MBBI);
68 void ExpandVST(MachineBasicBlock::iterator &MBBI);
69 void ExpandLaneOp(MachineBasicBlock::iterator &MBBI);
70 void ExpandVTBL(MachineBasicBlock::iterator &MBBI,
72 void ExpandMQQPRLoadStore(MachineBasicBlock::iterator &MBBI);
74 MachineBasicBlock::iterator &MBBI);
76 MachineBasicBlock::iterator &MBBI);
78 MachineBasicBlock::iterator MBBI, const DebugLoc &DL,
82 MachineBasicBlock::iterator MBBI);
84 MachineBasicBlock::iterator MBBI,
87 MachineBasicBlock::iterator MBBI,
90 MachineBasicBlock::iterator MBBI, DebugLoc &DL,
94 MachineBasicBlock::iterator MBBI, DebugLoc &DL,
98 MachineBasicBlock::iterator MBBI, DebugLoc &DL,
101 MachineBasicBlock::iterator MBBI, DebugLoc &DL,
104 MachineBasicBlock::iterator MBBI, DebugLoc &DL,
107 MachineBasicBlock::iterator MBBI, DebugLoc &DL,
110 MachineBasicBlock::iterator MBBI, unsigned LdrexOp,
115 MachineBasicBlock::iterator MBBI,
552 void ARMExpandPseudo::ExpandVLD(MachineBasicBlock::iterator &MBBI) { in ExpandVLD() argument
553 MachineInstr &MI = *MBBI; in ExpandVLD()
562 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandVLD()
670 void ARMExpandPseudo::ExpandVST(MachineBasicBlock::iterator &MBBI) { in ExpandVST() argument
671 MachineInstr &MI = *MBBI; in ExpandVST()
680 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandVST()
746 void ARMExpandPseudo::ExpandLaneOp(MachineBasicBlock::iterator &MBBI) { in ExpandLaneOp() argument
747 MachineInstr &MI = *MBBI; in ExpandLaneOp()
757 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandLaneOp()
836 void ARMExpandPseudo::ExpandVTBL(MachineBasicBlock::iterator &MBBI, in ExpandVTBL() argument
838 MachineInstr &MI = *MBBI; in ExpandVTBL()
842 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc)); in ExpandVTBL()
873 void ARMExpandPseudo::ExpandMQQPRLoadStore(MachineBasicBlock::iterator &MBBI) { in ExpandMQQPRLoadStore() argument
874 MachineInstr &MI = *MBBI; in ExpandMQQPRLoadStore()
881 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc)); in ExpandMQQPRLoadStore()
994 MachineBasicBlock::iterator &MBBI) { in ExpandTMOV32BitImm() argument
995 MachineInstr &MI = *MBBI; in ExpandTMOV32BitImm()
1022 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::tLSLri), DstReg) in ExpandTMOV32BitImm()
1036 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Op), DstReg) in ExpandTMOV32BitImm()
1054 (--MBBI)->getOperand(0).setIsDead(DstIsDead); in ExpandTMOV32BitImm()
1060 MachineBasicBlock::iterator &MBBI) { in ExpandMOV32BitImm() argument
1061 MachineInstr &MI = *MBBI; in ExpandMOV32BitImm()
1083 LO16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVi), DstReg); in ExpandMOV32BitImm()
1084 HI16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::ORRri)) in ExpandMOV32BitImm()
1090 LO16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MVNi), DstReg); in ExpandMOV32BitImm()
1091 HI16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::SUBri)) in ExpandMOV32BitImm()
1127 LO16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(LO16Opc), DstReg); in ExpandMOV32BitImm()
1139 HI16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(HI16Opc)) in ExpandMOV32BitImm()
1153 finalizeBundle(MBB, LO16->getIterator(), MBBI->getIterator()); in ExpandMOV32BitImm()
1178 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, in CMSEClearGPRegs() argument
1185 BuildMI(MBB, MBBI, DL, TII->get(ARM::t2CLRM)).add(predOps(ARMCC::AL)); in CMSEClearGPRegs()
1196 BuildMI(MBB, MBBI, DL, TII->get(ARM::tMOVr), Reg) in CMSEClearGPRegs()
1201 BuildMI(MBB, MBBI, DL, TII->get(ARM::t2MSR_M)) in CMSEClearGPRegs()
1243 MachineBasicBlock::iterator MBBI) { in CMSEClearFPRegs() argument
1245 (void)determineFPRegsToClear(*MBBI, ClearRegs); in CMSEClearFPRegs()
1248 return CMSEClearFPRegsV81(MBB, MBBI, ClearRegs); in CMSEClearFPRegs()
1250 return CMSEClearFPRegsV8(MBB, MBBI, ClearRegs); in CMSEClearFPRegs()
1257 MachineBasicBlock::iterator MBBI, in CMSEClearFPRegsV8() argument
1262 auto &RetI = *MBBI; in CMSEClearFPRegsV8()
1279 DoneBB->splice(DoneBB->end(), &MBB, MBBI, MBB.end()); in CMSEClearFPRegsV8()
1366 MachineBasicBlock::iterator MBBI, in CMSEClearFPRegsV81() argument
1368 auto &RetI = *MBBI; in CMSEClearFPRegsV81()
1381 BuildMI(MBB, MBBI, RetI.getDebugLoc(), TII->get(ARM::VSCCLRMS)) in CMSEClearFPRegsV81()
1392 BuildMI(MBB, MBBI, RetI.getDebugLoc(), TII->get(ARM::VSCCLRMS)) in CMSEClearFPRegsV81()
1403 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, DebugLoc &DL, in CMSESaveClearFPRegs() argument
1406 CMSESaveClearFPRegsV81(MBB, MBBI, DL, LiveRegs); in CMSESaveClearFPRegs()
1408 CMSESaveClearFPRegsV8(MBB, MBBI, DL, LiveRegs, ScratchRegs); in CMSESaveClearFPRegs()
1413 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, DebugLoc &DL, in CMSESaveClearFPRegsV8() argument
1421 BuildMI(MBB, MBBI, DL, TII->get(ARM::tSUBspi), ARM::SP) in CMSESaveClearFPRegsV8()
1429 for (const MachineOperand &Op : MBBI->operands()) { in CMSESaveClearFPRegsV8()
1442 BuildMI(MBB, MBBI, DL, TII->get(ARM::VMOVRRD)) in CMSESaveClearFPRegsV8()
1456 BuildMI(MBB, MBBI, DL, TII->get(ARM::VMOVRS), SaveReg) in CMSESaveClearFPRegsV8()
1474 BuildMI(MBB, MBBI, DL, TII->get(ARM::VLSTM)) in CMSESaveClearFPRegsV8()
1492 BuildMI(MBB, MBBI, DL, TII->get(ARM::VMOVDRR), Reg) in CMSESaveClearFPRegsV8()
1497 BuildMI(MBB, MBBI, DL, TII->get(ARM::VMOVSR), Reg) in CMSESaveClearFPRegsV8()
1505 BuildMI(MBB, MBBI, DL, TII->get(ARM::VLDRD), Reg) in CMSESaveClearFPRegsV8()
1513 BuildMI(MBB, MBBI, DL, TII->get(ARM::VLDRS), SReg0) in CMSESaveClearFPRegsV8()
1517 BuildMI(MBB, MBBI, DL, TII->get(ARM::VLDRS), SReg0 + 1) in CMSESaveClearFPRegsV8()
1523 BuildMI(MBB, MBBI, DL, TII->get(ARM::VLDRS), Reg) in CMSESaveClearFPRegsV8()
1532 BuildMI(MBB, MBBI, DL, TII->get(ARM::tLDRspi), SpareReg) in CMSESaveClearFPRegsV8()
1536 BuildMI(MBB, MBBI, DL, TII->get(ARM::t2BICri), SpareReg) in CMSESaveClearFPRegsV8()
1541 BuildMI(MBB, MBBI, DL, TII->get(ARM::t2BICri), SpareReg) in CMSESaveClearFPRegsV8()
1546 BuildMI(MBB, MBBI, DL, TII->get(ARM::VMSR)) in CMSESaveClearFPRegsV8()
1551 finalizeBundle(MBB, VLSTM->getIterator(), MBBI->getIterator()); in CMSESaveClearFPRegsV8()
1556 MachineBasicBlock::iterator MBBI, in CMSESaveClearFPRegsV81() argument
1560 bool DefFP = determineFPRegsToClear(*MBBI, ClearRegs); in CMSESaveClearFPRegsV81()
1567 BuildMI(MBB, MBBI, DL, TII->get(ARM::tSUBspi), ARM::SP) in CMSESaveClearFPRegsV81()
1574 BuildMI(MBB, MBBI, DL, TII->get(ARM::VLSTM)) in CMSESaveClearFPRegsV81()
1589 BuildMI(MBB, MBBI, DL, TII->get(ARM::VSTMSDB_UPD), ARM::SP) in CMSESaveClearFPRegsV81()
1596 (void)CMSEClearFPRegsV81(MBB, MBBI, ClearRegs); in CMSESaveClearFPRegsV81()
1599 BuildMI(MBB, MBBI, DL, TII->get(ARM::VSTR_FPCXTS_pre), ARM::SP) in CMSESaveClearFPRegsV81()
1608 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, DebugLoc &DL, in CMSERestoreFPRegs() argument
1611 CMSERestoreFPRegsV81(MBB, MBBI, DL, AvailableRegs); in CMSERestoreFPRegs()
1613 CMSERestoreFPRegsV8(MBB, MBBI, DL, AvailableRegs); in CMSERestoreFPRegs()
1617 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, DebugLoc &DL, in CMSERestoreFPRegsV8() argument
1628 for (const MachineOperand &Op : MBBI->operands()) { in CMSERestoreFPRegsV8()
1641 BuildMI(MBB, MBBI, DL, TII->get(ARM::VMOVRRD)) in CMSERestoreFPRegsV8()
1655 BuildMI(MBB, MBBI, DL, TII->get(ARM::VMOVRS), SaveReg) in CMSERestoreFPRegsV8()
1673 BuildMI(MBB, MBBI, DL, TII->get(ARM::VSTRD)) in CMSERestoreFPRegsV8()
1679 BuildMI(MBB, MBBI, DL, TII->get(ARM::VSTRS)) in CMSERestoreFPRegsV8()
1689 BuildMI(MBB, MBBI, DL, TII->get(ARM::VLLDM)) in CMSERestoreFPRegsV8()
1732 BuildMI(MBB, MBBI, DL, TII->get(ARM::VMOVDRR), Reg) in CMSERestoreFPRegsV8()
1737 BuildMI(MBB, MBBI, DL, TII->get(ARM::VMOVSR), Reg) in CMSERestoreFPRegsV8()
1743 BuildMI(MBB, MBBI, DL, TII->get(ARM::tADDspi), ARM::SP) in CMSERestoreFPRegsV8()
1763 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, DebugLoc &DL, in CMSERestoreFPRegsV81() argument
1765 if (!definesOrUsesFPReg(*MBBI)) { in CMSERestoreFPRegsV81()
1767 BuildMI(MBB, MBBI, DL, TII->get(ARM::VSCCLRMS)) in CMSERestoreFPRegsV81()
1773 BuildMI(MBB, MBBI, DL, TII->get(ARM::VLLDM)) in CMSERestoreFPRegsV81()
1780 BuildMI(MBB, MBBI, DL, TII->get(ARM::tADDspi), ARM::SP) in CMSERestoreFPRegsV81()
1786 BuildMI(MBB, MBBI, MBBI->getDebugLoc(), TII->get(ARM::VLDR_FPCXTS_post), in CMSERestoreFPRegsV81()
1794 BuildMI(MBB, MBBI, DL, TII->get(ARM::VLDMSIA_UPD), ARM::SP) in CMSERestoreFPRegsV81()
1806 MachineBasicBlock::iterator MBBI, in ExpandCMP_SWAP() argument
1812 MachineInstr &MI = *MBBI; in ExpandCMP_SWAP()
1843 BuildMI(MBB, MBBI, DL, TII->get(UxtOp), DesiredReg) in ExpandCMP_SWAP()
1938 MachineBasicBlock::iterator MBBI, in ExpandCMP_SWAP_64() argument
1942 MachineInstr &MI = *MBBI; in ExpandCMP_SWAP_64()
2044 MachineBasicBlock::iterator MBBI, int JumpReg, in CMSEPushCalleeSaves() argument
2046 const DebugLoc &DL = MBBI->getDebugLoc(); in CMSEPushCalleeSaves()
2049 BuildMI(MBB, MBBI, DL, TII.get(ARM::tPUSH)).add(predOps(ARMCC::AL)); in CMSEPushCalleeSaves()
2065 BuildMI(MBB, MBBI, DL, TII.get(ARM::tMOVr), LoReg) in CMSEPushCalleeSaves()
2071 BuildMI(MBB, MBBI, DL, TII.get(ARM::tPUSH)).add(predOps(ARMCC::AL)); in CMSEPushCalleeSaves()
2083 BuildMI(MBB, MBBI, DL, TII.get(ARM::tMOVr), LoReg) in CMSEPushCalleeSaves()
2086 BuildMI(MBB, MBBI, DL, TII.get(ARM::tPUSH)) in CMSEPushCalleeSaves()
2092 BuildMI(MBB, MBBI, DL, TII.get(ARM::t2STMDB_UPD), ARM::SP) in CMSEPushCalleeSaves()
2104 MachineBasicBlock::iterator MBBI, int JumpReg, in CMSEPopCalleeSaves() argument
2106 const DebugLoc &DL = MBBI->getDebugLoc(); in CMSEPopCalleeSaves()
2109 BuildMI(MBB, MBBI, DL, TII.get(ARM::tPOP)).add(predOps(ARMCC::AL)); in CMSEPopCalleeSaves()
2112 BuildMI(MBB, MBBI, DL, TII.get(ARM::tMOVr), ARM::R8 + R) in CMSEPopCalleeSaves()
2117 BuildMI(MBB, MBBI, DL, TII.get(ARM::tPOP)).add(predOps(ARMCC::AL)); in CMSEPopCalleeSaves()
2122 BuildMI(MBB, MBBI, DL, TII.get(ARM::t2LDMIA_UPD), ARM::SP) in CMSEPopCalleeSaves()
2131 MachineBasicBlock::iterator MBBI, in ExpandMI() argument
2133 MachineInstr &MI = *MBBI; in ExpandMI()
2145 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc)) in ExpandMI()
2155 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc)) in ExpandMI()
2166 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc)) in ExpandMI()
2176 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(MoveOpc)) in ExpandMI()
2184 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc)) in ExpandMI()
2202 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr(); in ExpandMI() local
2203 if (MBBI->getOpcode() == ARM::SEH_EpilogEnd) in ExpandMI()
2204 MBBI--; in ExpandMI()
2205 if (MBBI->getOpcode() == ARM::SEH_Nop_Ret) in ExpandMI()
2206 MBBI--; in ExpandMI()
2207 assert(MBBI->isReturn() && in ExpandMI()
2209 unsigned RetOpcode = MBBI->getOpcode(); in ExpandMI()
2210 DebugLoc dl = MBBI->getDebugLoc(); in ExpandMI()
2215 MBBI = MBB.getLastNonDebugInstr(); in ExpandMI()
2216 if (MBBI->getOpcode() == ARM::SEH_EpilogEnd) in ExpandMI()
2217 MBBI--; in ExpandMI()
2218 if (MBBI->getOpcode() == ARM::SEH_Nop_Ret) in ExpandMI()
2219 MBBI--; in ExpandMI()
2220 MachineOperand &JumpTarget = MBBI->getOperand(0); in ExpandMI()
2232 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(TCOpcode)); in ExpandMI()
2250 BuildMI(MBB, MBBI, dl, in ExpandMI()
2255 auto NewMI = std::prev(MBBI); in ExpandMI()
2256 for (unsigned i = 2, e = MBBI->getNumOperands(); i != e; ++i) in ExpandMI()
2257 NewMI->addOperand(MBBI->getOperand(i)); in ExpandMI()
2266 MBB.erase(MBBI); in ExpandMI()
2268 MBBI = NewMI; in ExpandMI()
2275 BuildMI(MBB, MBBI, DebugLoc(), TII->get(ARM::t2AUT)); in ExpandMI()
2277 MachineBasicBlock &AfterBB = CMSEClearFPRegs(MBB, MBBI); in ExpandMI()
2281 BuildMI(MBB, MBBI, MBBI->getDebugLoc(), in ExpandMI()
2292 assert(llvm::all_of(MBBI->operands(), [](const MachineOperand &Op) { in ExpandMI()
2297 *MBBI, {ARM::R0, ARM::R1, ARM::R2, ARM::R3, ARM::R12}, ClearRegs); in ExpandMI()
2298 CMSEClearGPRegs(AfterBB, AfterBB.end(), MBBI->getDebugLoc(), ClearRegs, in ExpandMI()
2302 BuildMI(AfterBB, AfterBB.end(), MBBI->getDebugLoc(), in ExpandMI()
2312 DebugLoc DL = MBBI->getDebugLoc(); in ExpandMI()
2313 Register JumpReg = MBBI->getOperand(0).getReg(); in ExpandMI()
2321 for (const MachineInstr &MI : make_range(MBB.rbegin(), MBBI.getReverse())) in ExpandMI()
2323 LiveRegs.stepBackward(*MBBI); in ExpandMI()
2325 CMSEPushCalleeSaves(*TII, MBB, MBBI, JumpReg, LiveRegs, in ExpandMI()
2329 determineGPRegsToClear(*MBBI, in ExpandMI()
2342 BuildMI(MBB, MBBI, DL, TII->get(ARM::t2BICri), JumpReg) in ExpandMI()
2351 BuildMI(MBB, MBBI, DL, TII->get(ARM::tMOVi8), ScratchReg) in ExpandMI()
2355 BuildMI(MBB, MBBI, DL, TII->get(ARM::tBIC), JumpReg) in ExpandMI()
2362 CMSESaveClearFPRegs(MBB, MBBI, DL, LiveRegs, in ExpandMI()
2364 CMSEClearGPRegs(MBB, MBBI, DL, ClearRegs, JumpReg); in ExpandMI()
2367 BuildMI(MBB, MBBI, DL, TII->get(ARM::tBLXNSr)) in ExpandMI()
2376 CMSERestoreFPRegs(MBB, MBBI, DL, OriginalClearRegs); // restore FP registers in ExpandMI()
2378 CMSEPopCalleeSaves(*TII, MBB, MBBI, JumpReg, AFI->isThumb1OnlyFunction()); in ExpandMI()
2387 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(newOpc), in ExpandMI()
2400 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc), in ExpandMI()
2412 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsi), in ExpandMI()
2425 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsr), in ExpandMI()
2441 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc), in ExpandMI()
2453 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc), in ExpandMI()
2467 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc), in ExpandMI()
2490 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc), in ExpandMI()
2516 emitT2RegPlusImmediate(MBB, MBBI, MI.getDebugLoc(), ARM::R6, in ExpandMI()
2519 emitThumbRegPlusImmediate(MBB, MBBI, MI.getDebugLoc(), ARM::R6, in ExpandMI()
2522 emitARMRegPlusImmediate(MBB, MBBI, MI.getDebugLoc(), ARM::R6, in ExpandMI()
2538 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(bicOpc), ARM::R6) in ExpandMI()
2552 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsi), in ExpandMI()
2564 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVsi), in ExpandMI()
2588 BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandMI()
2596 BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandMI()
2602 MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandMI()
2623 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewLdOpc), DstReg) in ExpandMI()
2628 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::tPICADD)) in ExpandMI()
2679 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(LDRLITOpc), DstReg) in ExpandMI()
2687 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(PICAddOpc)) in ExpandMI()
2717 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(LO16Opc), DstReg) in ExpandMI()
2722 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(HI16Opc), DstReg) in ExpandMI()
2728 MachineInstrBuilder MIB3 = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandMI()
2746 ExpandMOV32BitImm(MBB, MBBI); in ExpandMI()
2750 ExpandTMOV32BitImm(MBB, MBBI); in ExpandMI()
2761 ExpandTMOV32BitImm(MBB, MBBI); in ExpandMI()
2765 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::SUBri), ARM::PC) in ExpandMI()
2778 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc)); in ExpandMI()
2809 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(NewOpc)); in ExpandMI()
2968 ExpandVLD(MBBI); in ExpandMI()
3058 ExpandVST(MBBI); in ExpandMI()
3133 ExpandLaneOp(MBBI); in ExpandMI()
3136 case ARM::VTBL3Pseudo: ExpandVTBL(MBBI, ARM::VTBL3, false); return true; in ExpandMI()
3137 case ARM::VTBL4Pseudo: ExpandVTBL(MBBI, ARM::VTBL4, false); return true; in ExpandMI()
3138 case ARM::VTBX3Pseudo: ExpandVTBL(MBBI, ARM::VTBX3, true); return true; in ExpandMI()
3139 case ARM::VTBX4Pseudo: ExpandVTBL(MBBI, ARM::VTBX4, true); return true; in ExpandMI()
3145 ExpandMQQPRLoadStore(MBBI); in ExpandMI()
3150 return ExpandCMP_SWAP(MBB, MBBI, ARM::t2LDREXB, ARM::t2STREXB, ARM::tUXTB, in ExpandMI()
3154 return ExpandCMP_SWAP(MBB, MBBI, ARM::t2LDREXH, ARM::t2STREXH, ARM::tUXTH, in ExpandMI()
3158 return ExpandCMP_SWAP(MBB, MBBI, ARM::t2LDREX, ARM::t2STREX, 0, NextMBBI); in ExpandMI()
3162 return ExpandCMP_SWAP(MBB, MBBI, ARM::LDREXB, ARM::STREXB, ARM::UXTB, in ExpandMI()
3166 return ExpandCMP_SWAP(MBB, MBBI, ARM::LDREXH, ARM::STREXH, ARM::UXTH, in ExpandMI()
3170 return ExpandCMP_SWAP(MBB, MBBI, ARM::LDREX, ARM::STREX, 0, NextMBBI); in ExpandMI()
3173 return ExpandCMP_SWAP_64(MBB, MBBI, NextMBBI); in ExpandMI()
3183 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::tPUSH)) in ExpandMI()
3188 MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::tBL)); in ExpandMI()
3191 BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::STMDB_UPD)) in ExpandMI()
3198 MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::BL)); in ExpandMI()
3227 BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandMI()
3246 MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end(); in ExpandMBB() local
3247 while (MBBI != E) { in ExpandMBB()
3248 MachineBasicBlock::iterator NMBBI = std::next(MBBI); in ExpandMBB()
3249 Modified |= ExpandMI(MBB, MBBI, NMBBI); in ExpandMBB()
3250 MBBI = NMBBI; in ExpandMBB()