207   unsigned AddrMode = (TSFlags & ARMII::AddrModeMask);  in convertToThreeAddress()  local
219   switch (AddrMode) {  in convertToThreeAddress()
2636   unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask);  in rewriteARMFrameIndex()  local
2641     AddrMode = ARMII::AddrMode2;  in rewriteARMFrameIndex()
2684     switch (AddrMode) {  in rewriteARMFrameIndex()
2730       Scale = (AddrMode == ARMII::AddrModeT2_i7s2 ? 2 :  in rewriteARMFrameIndex()
2731                AddrMode == ARMII::AddrModeT2_i7s4 ? 4 : 1);  in rewriteARMFrameIndex()
2757           if (AddrMode == ARMII::AddrMode_i12)  in rewriteARMFrameIndex()
2770         if (AddrMode == ARMII::AddrMode_i12)  in rewriteARMFrameIndex()
4883   ARMII::AddrMode AddrMode =  in verifyInstruction()  local
4884       (ARMII::AddrMode)(MI.getDesc().TSFlags & ARMII::AddrModeMask);  in verifyInstruction()
4885   switch (AddrMode) {  in verifyInstruction()
6098   unsigned AddrMode = (MI->getDesc().TSFlags & ARMII::AddrModeMask);  in checkAndUpdateStackOffset()  local
6102   else if (SPIdx != 1 && (AddrMode != ARMII::AddrModeT2_i8s4 || SPIdx != 2))  in checkAndUpdateStackOffset()
6108   if (AddrMode == ARMII::AddrMode1 ||       // Arithmetic instructions  in checkAndUpdateStackOffset()
6109       AddrMode == ARMII::AddrMode4 ||       // Load/Store Multiple  in checkAndUpdateStackOffset()
6110       AddrMode == ARMII::AddrMode6 ||       // Neon Load/Store Multiple  in checkAndUpdateStackOffset()
6111       AddrMode == ARMII::AddrModeT2_so ||   // SP can't be used as based register  in checkAndUpdateStackOffset()
6112       AddrMode == ARMII::AddrModeT2_pc ||   // PCrel access  in checkAndUpdateStackOffset()
6113       AddrMode == ARMII::AddrMode2 ||       // Used by PRE and POST indexed LD/ST  in checkAndUpdateStackOffset()
6114       AddrMode == ARMII::AddrModeT2_i7 ||   // v8.1-M MVE  in checkAndUpdateStackOffset()
6115       AddrMode == ARMII::AddrModeT2_i7s2 || // v8.1-M MVE  in checkAndUpdateStackOffset()
6116       AddrMode == ARMII::AddrModeT2_i7s4 || // v8.1-M sys regs VLDR/VSTR  in checkAndUpdateStackOffset()
6117       AddrMode == ARMII::AddrModeNone ||  in checkAndUpdateStackOffset()
6118       AddrMode == ARMII::AddrModeT2_i8 ||   // Pre/Post inc instructions  in checkAndUpdateStackOffset()
6119       AddrMode == ARMII::AddrModeT2_i8neg)  // Always negative imm  in checkAndUpdateStackOffset()
6136   switch (AddrMode) {  in checkAndUpdateStackOffset()