Lines Matching +full:scaled +full:- +full:sync
1 //===-- ARMAsmPrinter.cpp - Print machine code to an ARM .s file ----------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 // of machine-dependent LLVM code to GAS-format ARM assembly language.
12 //===----------------------------------------------------------------------===//
51 #define DEBUG_TYPE "asm-printer"
56 MCP(nullptr), InConstantPool(false), OptimizationGoals(-1) {} in ARMAsmPrinter()
64 OutStreamer->emitDataRegion(MCDR_DataRegionEnd); in emitFunctionBodyEnd()
68 if (AFI->isThumbFunction()) { in emitFunctionEntryLabel()
69 OutStreamer->emitAssemblerFlag(MCAF_Code16); in emitFunctionEntryLabel()
70 OutStreamer->emitThumbFunc(CurrentFnSym); in emitFunctionEntryLabel()
72 OutStreamer->emitAssemblerFlag(MCAF_Code32); in emitFunctionEntryLabel()
75 // Emit symbol for CMSE non-secure entry point in emitFunctionEntryLabel()
76 if (AFI->isCmseNSEntryFunction()) { in emitFunctionEntryLabel()
78 OutContext.getOrCreateSymbol("__acle_se_" + CurrentFnSym->getName()); in emitFunctionEntryLabel()
79 emitLinkage(&MF->getFunction(), S); in emitFunctionEntryLabel()
80 OutStreamer->emitSymbolAttribute(S, MCSA_ELF_TypeFunction); in emitFunctionEntryLabel()
81 OutStreamer->emitLabel(S); in emitFunctionEntryLabel()
87 uint64_t Size = getDataLayout().getTypeAllocSize(CV->getType()); in emitXXStructor()
90 const GlobalValue *GV = dyn_cast<GlobalValue>(CV->stripPointerCasts()); in emitXXStructor()
95 (Subtarget->isTargetELF() in emitXXStructor()
100 OutStreamer->emitValue(E, Size); in emitXXStructor()
110 /// runOnMachineFunction - This uses the emitInstruction()
125 for (const auto *GV : AFI->getGlobalsPromotedToConstantPool()) in runOnMachineFunction()
150 if (OptimizationGoals == -1) // uninitialized goals in runOnMachineFunction()
155 if (Subtarget->isTargetCOFF()) { in runOnMachineFunction()
161 OutStreamer->beginCOFFSymbolDef(CurrentFnSym); in runOnMachineFunction()
162 OutStreamer->emitCOFFSymbolStorageClass(Scl); in runOnMachineFunction()
163 OutStreamer->emitCOFFSymbolType(Type); in runOnMachineFunction()
164 OutStreamer->endCOFFSymbolDef(); in runOnMachineFunction()
177 OutStreamer->emitAssemblerFlag(MCAF_Code16); in runOnMachineFunction()
180 OutStreamer->emitLabel(TIP.second); in runOnMachineFunction()
211 GetARMGVSymbol(MO.getGlobal(), TF)->print(O, MAI); in PrintSymbolOperand()
217 const MachineOperand &MO = MI->getOperand(OpNum); in printOperand()
226 const MachineFunction &MF = *MI->getParent()->getParent(); in printOperand()
228 Reg = TRI->getSubReg(Reg, ARM::gsub_0); in printOperand()
252 MO.getMBB()->getSymbol()->print(O, MAI); in printOperand()
259 if (Subtarget->genExecuteOnly()) in printOperand()
260 llvm_unreachable("execute-only should not generate constant pools"); in printOperand()
261 GetCPISymbol(MO.getIndex())->print(O, MAI); in printOperand()
268 // indexes in MachineConstantPool, which isn't in sync with indexes used here. in GetCPISymbol()
275 //===--------------------------------------------------------------------===//
301 if (MI->getOperand(OpNum).isReg()) { in PrintAsmOperand()
302 MCRegister Reg = MI->getOperand(OpNum).getReg().asMCReg(); in PrintAsmOperand()
303 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo(); in PrintAsmOperand()
304 // Find the 'd' register that has this 's' register as a sub-register, in PrintAsmOperand()
306 for (MCPhysReg SR : TRI->superregs(Reg)) { in PrintAsmOperand()
309 bool Lane0 = TRI->getSubReg(SR, ARM::ssub_0) == Reg; in PrintAsmOperand()
316 if (!MI->getOperand(OpNum).isImm()) in PrintAsmOperand()
318 O << ~(MI->getOperand(OpNum).getImm()); in PrintAsmOperand()
321 if (!MI->getOperand(OpNum).isImm()) in PrintAsmOperand()
323 O << (MI->getOperand(OpNum).getImm() & 0xffff); in PrintAsmOperand()
326 if (!MI->getOperand(OpNum).isReg()) in PrintAsmOperand()
328 const MachineOperand &MO = MI->getOperand(OpNum); in PrintAsmOperand()
330 // This takes advantage of the 2 operand-ness of ldm/stm and that we've in PrintAsmOperand()
335 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo(); in PrintAsmOperand()
336 Register Reg0 = TRI->getSubReg(RegBegin, ARM::gsub_0); in PrintAsmOperand()
338 RegBegin = TRI->getSubReg(RegBegin, ARM::gsub_1); in PrintAsmOperand()
347 while (MI->getOperand(RegOps).isReg()) { in PrintAsmOperand()
349 << ARMInstPrinter::getRegisterName(MI->getOperand(RegOps).getReg()); in PrintAsmOperand()
361 const MachineOperand &FlagsOP = MI->getOperand(OpNum - 1); in PrintAsmOperand()
371 for (OpNum = InlineAsm::MIOp_FirstOperand; TiedIdx; --TiedIdx) { in PrintAsmOperand()
372 unsigned OpFlags = MI->getOperand(OpNum).getImm(); in PrintAsmOperand()
376 F = InlineAsm::Flag(MI->getOperand(OpNum).getImm()); in PrintAsmOperand()
397 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo(); in PrintAsmOperand()
399 ARM::GPRPairRegClass.hasSubClassEq(TRI->getRegClass(RC))) { in PrintAsmOperand()
402 const MachineOperand &MO = MI->getOperand(OpNum); in PrintAsmOperand()
405 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo(); in PrintAsmOperand()
407 TRI->getSubReg(MO.getReg(), FirstHalf ? ARM::gsub_0 : ARM::gsub_1); in PrintAsmOperand()
414 if (RegOp >= MI->getNumOperands()) in PrintAsmOperand()
416 const MachineOperand &MO = MI->getOperand(RegOp); in PrintAsmOperand()
426 if (!MI->getOperand(OpNum).isReg()) in PrintAsmOperand()
428 Register Reg = MI->getOperand(OpNum).getReg(); in PrintAsmOperand()
431 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo(); in PrintAsmOperand()
433 TRI->getSubReg(Reg, ExtraCode[0] == 'e' ? ARM::dsub_0 : ARM::dsub_1); in PrintAsmOperand()
441 case 'H': { // The highest-numbered register of a pair. in PrintAsmOperand()
442 const MachineOperand &MO = MI->getOperand(OpNum); in PrintAsmOperand()
445 const MachineFunction &MF = *MI->getParent()->getParent(); in PrintAsmOperand()
450 Reg = TRI->getSubReg(Reg, ARM::gsub_1); in PrintAsmOperand()
472 if (!MI->getOperand(OpNum).isReg()) in PrintAsmMemoryOperand()
474 O << ARMInstPrinter::getRegisterName(MI->getOperand(OpNum).getReg()); in PrintAsmMemoryOperand()
479 const MachineOperand &MO = MI->getOperand(OpNum); in PrintAsmMemoryOperand()
495 OutStreamer->emitAssemblerFlag(WasThumb ? MCAF_Code16 : MCAF_Code32); in emitInlineAsmEnd()
502 OutStreamer->emitAssemblerFlag(MCAF_SyntaxUnified); in emitStartOfAsmFile()
512 OutStreamer->emitAssemblerFlag(MCAF_Code16); in emitStartOfAsmFile()
530 // pointers need to be indirect and pc-rel. We accomplish this by in emitNonLazySymbolPointer()
542 // All darwin targets use mach-o. in emitEndOfAsmFile()
546 MMI->getObjFileInfo<MachineModuleInfoMachO>(); in emitEndOfAsmFile()
548 // Output non-lazy-pointers for external and common global variables. in emitEndOfAsmFile()
553 OutStreamer->switchSection(TLOFMacho.getNonLazySymbolPointerSection()); in emitEndOfAsmFile()
560 OutStreamer->addBlankLine(); in emitEndOfAsmFile()
566 OutStreamer->switchSection(TLOFMacho.getThreadLocalPointerSection()); in emitEndOfAsmFile()
573 OutStreamer->addBlankLine(); in emitEndOfAsmFile()
581 OutStreamer->emitAssemblerFlag(MCAF_SubsectionsViaSymbols); in emitEndOfAsmFile()
585 MCTargetStreamer &TS = *OutStreamer->getTargetStreamer(); in emitEndOfAsmFile()
589 (Subtarget->isTargetAEABI() || Subtarget->isTargetGNUAEABI() || in emitEndOfAsmFile()
590 Subtarget->isTargetMuslAEABI())) in emitEndOfAsmFile()
592 OptimizationGoals = -1; in emitEndOfAsmFile()
597 //===----------------------------------------------------------------------===//
600 // The following seem like one-off assembler flags, but they actually need
624 MCTargetStreamer &TS = *OutStreamer->getTargetStreamer(); in emitAttributes()
680 if (checkDenormalAttributeConsistency(*MMI->getModule(), "denormal-fp-math", in emitAttributes()
684 else if (checkDenormalAttributeConsistency(*MMI->getModule(), in emitAttributes()
685 "denormal-fp-math", in emitAttributes()
719 if (checkFunctionsAttributeConsistency(*MMI->getModule(), in emitAttributes()
720 "no-trapping-math", "true") || in emitAttributes()
728 // rounding at run-time, emit the rounding attribute. in emitAttributes()
734 // equivalent of GCC's -ffinite-math-only flag. in emitAttributes()
743 // 8-bytes alignment stuff. in emitAttributes()
747 // Hard float. Use both S and D registers and conform to AAPCS-VFP. in emitAttributes()
752 // -mfp16-format option and associated plumbing must be in emitAttributes()
758 if (const Module *SourceModule = MMI->getModule()) { in emitAttributes()
762 SourceModule->getModuleFlag("wchar_size"))) { in emitAttributes()
763 int WCharWidth = WCharWidthValue->getZExtValue(); in emitAttributes()
773 SourceModule->getModuleFlag("min_enum_size"))) { in emitAttributes()
774 int EnumWidth = EnumWidthValue->getZExtValue(); in emitAttributes()
782 SourceModule->getModuleFlag("sign-return-address")); in emitAttributes()
783 if (PACValue && PACValue->isOne()) { in emitAttributes()
795 SourceModule->getModuleFlag("branch-target-enforcement")); in emitAttributes()
796 if (BTIValue && BTIValue->isOne()) { in emitAttributes()
820 //===----------------------------------------------------------------------===//
861 if (Subtarget->isTargetMachO()) { in GetARMGVSymbol()
863 (TargetFlags & ARMII::MO_NONLAZY) && Subtarget->isGVIndirectSymbol(GV); in GetARMGVSymbol()
871 MMI->getObjFileInfo<MachineModuleInfoMachO>(); in GetARMGVSymbol()
873 GV->isThreadLocal() ? MMIMachO.getThreadLocalGVStubEntry(MCSym) in GetARMGVSymbol()
878 !GV->hasInternalLinkage()); in GetARMGVSymbol()
880 } else if (Subtarget->isTargetCOFF()) { in GetARMGVSymbol()
881 assert(Subtarget->isTargetWindows() && in GetARMGVSymbol()
900 MMI->getObjFileInfo<MachineModuleInfoCOFF>(); in GetARMGVSymbol()
909 } else if (Subtarget->isTargetELF()) { in GetARMGVSymbol()
918 int Size = DL.getTypeAllocSize(MCPV->getType()); in emitMachineConstantPoolValue()
922 if (ACPV->isPromotedGlobal()) { in emitMachineConstantPoolValue()
933 for (const auto *GV : ACPC->promotedGlobals()) { in emitMachineConstantPoolValue()
936 OutStreamer->emitLabel(GVSym); in emitMachineConstantPoolValue()
940 return emitGlobalConstant(DL, ACPC->getPromotedGlobalInit()); in emitMachineConstantPoolValue()
944 if (ACPV->isLSDA()) { in emitMachineConstantPoolValue()
945 MCSym = getMBBExceptionSym(MF->front()); in emitMachineConstantPoolValue()
946 } else if (ACPV->isBlockAddress()) { in emitMachineConstantPoolValue()
948 cast<ARMConstantPoolConstant>(ACPV)->getBlockAddress(); in emitMachineConstantPoolValue()
950 } else if (ACPV->isGlobalValue()) { in emitMachineConstantPoolValue()
951 const GlobalValue *GV = cast<ARMConstantPoolConstant>(ACPV)->getGV(); in emitMachineConstantPoolValue()
953 // On Darwin, const-pool entries may get the "FOO$non_lazy_ptr" mangling, so in emitMachineConstantPoolValue()
955 unsigned char TF = Subtarget->isTargetMachO() ? ARMII::MO_NONLAZY : 0; in emitMachineConstantPoolValue()
957 } else if (ACPV->isMachineBasicBlock()) { in emitMachineConstantPoolValue()
958 const MachineBasicBlock *MBB = cast<ARMConstantPoolMBB>(ACPV)->getMBB(); in emitMachineConstantPoolValue()
959 MCSym = MBB->getSymbol(); in emitMachineConstantPoolValue()
961 assert(ACPV->isExtSymbol() && "unrecognized constant pool value"); in emitMachineConstantPoolValue()
962 auto Sym = cast<ARMConstantPoolSymbol>(ACPV)->getSymbol(); in emitMachineConstantPoolValue()
968 MCSymbolRefExpr::create(MCSym, getModifierVariantKind(ACPV->getModifier()), in emitMachineConstantPoolValue()
971 if (ACPV->getPCAdjustment()) { in emitMachineConstantPoolValue()
974 ACPV->getLabelId(), OutContext); in emitMachineConstantPoolValue()
978 MCConstantExpr::create(ACPV->getPCAdjustment(), in emitMachineConstantPoolValue()
981 if (ACPV->mustAddCurrentAddress()) { in emitMachineConstantPoolValue()
982 // We want "(<expr> - .)", but MC doesn't have a concept of the '.' in emitMachineConstantPoolValue()
985 OutStreamer->emitLabel(DotSym); in emitMachineConstantPoolValue()
991 OutStreamer->emitValue(Expr, Size); in emitMachineConstantPoolValue()
995 const MachineOperand &MO1 = MI->getOperand(1); in emitJumpTableAddrs()
998 // Make sure the Thumb jump table is 4-byte aligned. This will be a nop for in emitJumpTableAddrs()
1004 OutStreamer->emitLabel(JTISymbol); in emitJumpTableAddrs()
1006 // Mark the jump table as data-in-code. in emitJumpTableAddrs()
1007 OutStreamer->emitDataRegion(MCDR_DataRegionJT32); in emitJumpTableAddrs()
1010 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo(); in emitJumpTableAddrs()
1011 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables(); in emitJumpTableAddrs()
1016 // (BasicBlockAddr - TableBeginAddr) in emitJumpTableAddrs()
1021 // .word (LBB0 - LJTI_0_0) in emitJumpTableAddrs()
1022 // .word (LBB1 - LJTI_0_0) in emitJumpTableAddrs()
1023 const MCExpr *Expr = MCSymbolRefExpr::create(MBB->getSymbol(), OutContext); in emitJumpTableAddrs()
1025 if (isPositionIndependent() || Subtarget->isROPI()) in emitJumpTableAddrs()
1031 else if (AFI->isThumbFunction()) in emitJumpTableAddrs()
1034 OutStreamer->emitValue(Expr, 4); in emitJumpTableAddrs()
1036 // Mark the end of jump table data-in-code region. in emitJumpTableAddrs()
1037 OutStreamer->emitDataRegion(MCDR_DataRegionEnd); in emitJumpTableAddrs()
1041 const MachineOperand &MO1 = MI->getOperand(1); in emitJumpTableInsts()
1044 // Make sure the Thumb jump table is 4-byte aligned. This will be a nop for in emitJumpTableInsts()
1050 OutStreamer->emitLabel(JTISymbol); in emitJumpTableInsts()
1053 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo(); in emitJumpTableInsts()
1054 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables(); in emitJumpTableInsts()
1058 const MCExpr *MBBSymbolExpr = MCSymbolRefExpr::create(MBB->getSymbol(), in emitJumpTableInsts()
1071 const MachineOperand &MO1 = MI->getOperand(1); in emitJumpTableTBInst()
1074 if (Subtarget->isThumb1Only()) in emitJumpTableTBInst()
1078 OutStreamer->emitLabel(JTISymbol); in emitJumpTableTBInst()
1081 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo(); in emitJumpTableTBInst()
1082 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables(); in emitJumpTableTBInst()
1085 // Mark the jump table as data-in-code. in emitJumpTableTBInst()
1086 OutStreamer->emitDataRegion(OffsetWidth == 1 ? MCDR_DataRegionJT8 in emitJumpTableTBInst()
1090 const MCExpr *MBBSymbolExpr = MCSymbolRefExpr::create(MBB->getSymbol(), in emitJumpTableTBInst()
1094 // (BasicBlockAddr - TBBInstAddr + 4) / 2 in emitJumpTableTBInst()
1099 // .byte (LBB0 - (LCPI0_0 + 4)) / 2 in emitJumpTableTBInst()
1100 // .byte (LBB1 - (LCPI0_0 + 4)) / 2 in emitJumpTableTBInst()
1103 MCSymbol *TBInstPC = GetCPISymbol(MI->getOperand(0).getImm()); in emitJumpTableTBInst()
1110 OutStreamer->emitValue(Expr, OffsetWidth); in emitJumpTableTBInst()
1112 // Mark the end of jump table data-in-code region. 32-bit offsets use in emitJumpTableTBInst()
1113 // actual branch instructions here, so we don't mark those as a data-region in emitJumpTableTBInst()
1115 OutStreamer->emitDataRegion(MCDR_DataRegionEnd); in emitJumpTableTBInst()
1117 // Make sure the next instruction is 2-byte aligned. in emitJumpTableTBInst()
1129 switch (BranchInstr->getOpcode()) { in getCodeViewJumpTableInfo()
1139 // half-word shifted left, relative to *after* the branch instruction. in getCodeViewJumpTableInfo()
1141 BranchLabel = GetCPISymbol(BranchInstr->getOperand(3).getImm()); in getCodeViewJumpTableInfo()
1149 BranchLabel = GetCPISymbol(BranchInstr->getOperand(3).getImm()); in getCodeViewJumpTableInfo()
1166 assert(MI->getFlag(MachineInstr::FrameSetup) && in EmitUnwindingInstruction()
1169 MCTargetStreamer &TS = *OutStreamer->getTargetStreamer(); in EmitUnwindingInstruction()
1171 const MachineFunction &MF = *MI->getParent()->getParent(); in EmitUnwindingInstruction()
1176 Register FramePtr = TargetRegInfo->getFrameRegister(MF); in EmitUnwindingInstruction()
1177 unsigned Opc = MI->getOpcode(); in EmitUnwindingInstruction()
1203 // So we need to special-case MOVS, ADDS and LSLS, and keep track of in EmitUnwindingInstruction()
1208 DstReg = MI->getOperand(0).getReg(); in EmitUnwindingInstruction()
1211 SrcReg = MI->getOperand(1).getReg(); in EmitUnwindingInstruction()
1212 DstReg = MI->getOperand(0).getReg(); in EmitUnwindingInstruction()
1217 if (MI->mayStore()) { in EmitUnwindingInstruction()
1236 MI->print(errs()); in EmitUnwindingInstruction()
1247 for (unsigned i = StartOp, NumOps = MI->getNumOperands() - NumOffset; in EmitUnwindingInstruction()
1249 const MachineOperand &MO = MI->getOperand(i); in EmitUnwindingInstruction()
1262 TargetRegInfo->getRegSizeInBits(MO.getReg(), MachineRegInfo) / 8; in EmitUnwindingInstruction()
1269 if (unsigned RemappedReg = AFI->EHPrologueRemappedRegs.lookup(Reg)) in EmitUnwindingInstruction()
1277 assert(MI->getOperand(2).getReg() == ARM::SP && in EmitUnwindingInstruction()
1279 if (unsigned RemappedReg = AFI->EHPrologueRemappedRegs.lookup(SrcReg)) in EmitUnwindingInstruction()
1285 assert(MI->getOperand(3).getReg() == ARM::SP && in EmitUnwindingInstruction()
1287 SrcReg = MI->getOperand(1).getReg(); in EmitUnwindingInstruction()
1288 if (unsigned RemappedReg = AFI->EHPrologueRemappedRegs.lookup(SrcReg)) in EmitUnwindingInstruction()
1291 SrcReg = MI->getOperand(2).getReg(); in EmitUnwindingInstruction()
1292 if (unsigned RemappedReg = AFI->EHPrologueRemappedRegs.lookup(SrcReg)) in EmitUnwindingInstruction()
1295 PadBefore = -MI->getOperand(4).getImm() - 8; in EmitUnwindingInstruction()
1298 if (MAI->getExceptionHandlingType() == ExceptionHandling::ARM) { in EmitUnwindingInstruction()
1312 MI->print(errs()); in EmitUnwindingInstruction()
1323 Offset = -MI->getOperand(2).getImm(); in EmitUnwindingInstruction()
1330 Offset = MI->getOperand(2).getImm(); in EmitUnwindingInstruction()
1333 Offset = MI->getOperand(2).getImm()*4; in EmitUnwindingInstruction()
1337 Offset = -MI->getOperand(2).getImm()*4; in EmitUnwindingInstruction()
1341 -AFI->EHPrologueOffsetInRegs.lookup(MI->getOperand(2).getReg()); in EmitUnwindingInstruction()
1345 if (MAI->getExceptionHandlingType() == ExceptionHandling::ARM) { in EmitUnwindingInstruction()
1347 // Set-up of the frame pointer. Positive values correspond to "add" in EmitUnwindingInstruction()
1349 ATS.emitSetFP(FramePtr, ARM::SP, -Offset); in EmitUnwindingInstruction()
1357 ATS.emitMovSP(DstReg, -Offset); in EmitUnwindingInstruction()
1361 MI->print(errs()); in EmitUnwindingInstruction()
1367 // If a Thumb1 function spills r8-r11, we copy the values to low in EmitUnwindingInstruction()
1370 AFI->EHPrologueRemappedRegs[DstReg] = SrcReg; in EmitUnwindingInstruction()
1375 unsigned CPI = MI->getOperand(1).getIndex(); in EmitUnwindingInstruction()
1377 if (CPI >= MCP->getConstants().size()) in EmitUnwindingInstruction()
1378 CPI = AFI->getOriginalCPIdx(CPI); in EmitUnwindingInstruction()
1379 assert(CPI != -1U && "Invalid constpool index"); in EmitUnwindingInstruction()
1382 const MachineConstantPoolEntry &CPE = MCP->getConstants()[CPI]; in EmitUnwindingInstruction()
1384 Offset = cast<ConstantInt>(CPE.Val.ConstVal)->getSExtValue(); in EmitUnwindingInstruction()
1385 AFI->EHPrologueOffsetInRegs[DstReg] = Offset; in EmitUnwindingInstruction()
1389 Offset = MI->getOperand(1).getImm(); in EmitUnwindingInstruction()
1390 AFI->EHPrologueOffsetInRegs[DstReg] = Offset; in EmitUnwindingInstruction()
1393 Offset = MI->getOperand(2).getImm(); in EmitUnwindingInstruction()
1394 AFI->EHPrologueOffsetInRegs[DstReg] |= (Offset << 16); in EmitUnwindingInstruction()
1397 Offset = MI->getOperand(2).getImm(); in EmitUnwindingInstruction()
1398 AFI->EHPrologueOffsetInRegs[DstReg] = Offset; in EmitUnwindingInstruction()
1401 assert(MI->getOperand(3).getImm() == 8 && in EmitUnwindingInstruction()
1403 assert(MI->getOperand(2).getReg() == MI->getOperand(0).getReg() && in EmitUnwindingInstruction()
1405 AFI->EHPrologueOffsetInRegs[DstReg] <<= 8; in EmitUnwindingInstruction()
1408 assert(MI->getOperand(2).getReg() == MI->getOperand(0).getReg() && in EmitUnwindingInstruction()
1410 Offset = MI->getOperand(3).getImm(); in EmitUnwindingInstruction()
1411 AFI->EHPrologueOffsetInRegs[DstReg] += Offset; in EmitUnwindingInstruction()
1415 AFI->EHPrologueRemappedRegs[ARM::R12] = ARM::RA_AUTH_CODE; in EmitUnwindingInstruction()
1418 MI->print(errs()); in EmitUnwindingInstruction()
1425 // Simple pseudo-instructions have their lowering (with expansion to real
1426 // instructions) auto-generated.
1431 // ARM_MC::verifyInstructionPredicates(MI->getOpcode(), in emitInstruction()
1435 MCTargetStreamer &TS = *OutStreamer->getTargetStreamer(); in emitInstruction()
1439 if (InConstantPool && MI->getOpcode() != ARM::CONSTPOOL_ENTRY) { in emitInstruction()
1440 OutStreamer->emitDataRegion(MCDR_DataRegionEnd); in emitInstruction()
1444 // Emit unwinding stuff for frame-related instructions in emitInstruction()
1445 if (Subtarget->isTargetEHABICompatible() && in emitInstruction()
1446 MI->getFlag(MachineInstr::FrameSetup)) in emitInstruction()
1449 // Do any auto-generated pseudo lowerings. in emitInstruction()
1453 assert(!convertAddSubFlagsOpcode(MI->getOpcode()) && in emitInstruction()
1457 unsigned Opc = MI->getOpcode(); in emitInstruction()
1465 MCSymbol *CPISymbol = GetCPISymbol(MI->getOperand(1).getIndex()); in emitInstruction()
1466 EmitToStreamer(*OutStreamer, MCInstBuilder(MI->getOpcode() == in emitInstruction()
1468 : (MI->getOpcode() == ARM::tLEApcrel ? ARM::tADR in emitInstruction()
1470 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
1473 .addImm(MI->getOperand(2).getImm()) in emitInstruction()
1474 .addReg(MI->getOperand(3).getReg())); in emitInstruction()
1481 GetARMJTIPICJumpTableLabel(MI->getOperand(1).getIndex()); in emitInstruction()
1482 EmitToStreamer(*OutStreamer, MCInstBuilder(MI->getOpcode() == in emitInstruction()
1484 : (MI->getOpcode() == ARM::tLEApcrelJT ? ARM::tADR in emitInstruction()
1486 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
1489 .addImm(MI->getOperand(2).getImm()) in emitInstruction()
1490 .addReg(MI->getOperand(3).getReg())); in emitInstruction()
1505 assert(Subtarget->hasV4TOps()); in emitInstruction()
1507 .addReg(MI->getOperand(0).getReg())); in emitInstruction()
1511 if (Subtarget->hasV5TOps()) in emitInstruction()
1520 Register TReg = MI->getOperand(0).getReg(); in emitInstruction()
1534 // Create a link-saving branch to the Reg Indirect Jump Pad. in emitInstruction()
1553 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
1571 const MachineOperand &Op = MI->getOperand(0); in emitInstruction()
1587 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg())); in emitInstruction()
1589 unsigned TF = MI->getOperand(1).getTargetFlags(); in emitInstruction()
1590 const GlobalValue *GV = MI->getOperand(1).getGlobal(); in emitInstruction()
1596 MI->getOperand(2).getImm(), OutContext); in emitInstruction()
1619 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg())); in emitInstruction()
1620 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(1).getReg())); in emitInstruction()
1622 unsigned TF = MI->getOperand(2).getTargetFlags(); in emitInstruction()
1623 const GlobalValue *GV = MI->getOperand(2).getGlobal(); in emitInstruction()
1629 MI->getOperand(3).getImm(), OutContext); in emitInstruction()
1655 MI->getOperand(0).getIndex(), OutContext), in emitInstruction()
1659 if (MI->getOperand(1).isReg()) { in emitInstruction()
1661 MCInst.addReg(MI->getOperand(1).getReg()); in emitInstruction()
1665 if (MI->getOperand(1).isMBB()) in emitInstruction()
1667 MI->getOperand(1).getMBB()->getSymbol(), OutContext); in emitInstruction()
1668 else if (MI->getOperand(1).isGlobal()) { in emitInstruction()
1669 const GlobalValue *GV = MI->getOperand(1).getGlobal(); in emitInstruction()
1671 GetARMGVSymbol(GV, MI->getOperand(1).getTargetFlags()), OutContext); in emitInstruction()
1672 } else if (MI->getOperand(1).isSymbol()) { in emitInstruction()
1674 GetExternalSymbolSymbol(MI->getOperand(1).getSymbolName()), in emitInstruction()
1685 MI->getOperand(2).getIndex(), OutContext), in emitInstruction()
1688 MCInst.addImm(MI->getOperand(3).getImm()); in emitInstruction()
1690 MCInst.addImm(MI->getOperand(2).getImm()) in emitInstruction()
1691 .addReg(MI->getOperand(3).getReg()); in emitInstruction()
1701 OutStreamer->emitLabel(getBFLabel(DL.getPrivateGlobalPrefix(), in emitInstruction()
1703 MI->getOperand(0).getIndex(), OutContext)); in emitInstruction()
1713 OutStreamer->emitLabel(getPICLabel(DL.getPrivateGlobalPrefix(), in emitInstruction()
1715 MI->getOperand(2).getImm(), OutContext)); in emitInstruction()
1719 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
1720 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
1734 OutStreamer->emitLabel(getPICLabel(DL.getPrivateGlobalPrefix(), in emitInstruction()
1736 MI->getOperand(2).getImm(), OutContext)); in emitInstruction()
1740 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
1742 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
1744 .addImm(MI->getOperand(3).getImm()) in emitInstruction()
1745 .addReg(MI->getOperand(4).getReg()) in emitInstruction()
1762 // a PC-relative address at the ldr instruction. in emitInstruction()
1765 OutStreamer->emitLabel(getPICLabel(DL.getPrivateGlobalPrefix(), in emitInstruction()
1767 MI->getOperand(2).getImm(), OutContext)); in emitInstruction()
1771 switch (MI->getOpcode()) { in emitInstruction()
1784 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
1786 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
1789 .addImm(MI->getOperand(3).getImm()) in emitInstruction()
1790 .addReg(MI->getOperand(4).getReg())); in emitInstruction()
1795 if (Subtarget->genExecuteOnly()) in emitInstruction()
1796 llvm_unreachable("execute-only should not generate constant pools"); in emitInstruction()
1798 /// CONSTPOOL_ENTRY - This instruction represents a floating constant pool in emitInstruction()
1803 unsigned LabelId = (unsigned)MI->getOperand(0).getImm(); in emitInstruction()
1804 unsigned CPIdx = (unsigned)MI->getOperand(1).getIndex(); in emitInstruction()
1808 OutStreamer->emitDataRegion(MCDR_DataRegion); in emitInstruction()
1812 OutStreamer->emitLabel(GetCPISymbol(LabelId)); in emitInstruction()
1814 const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPIdx]; in emitInstruction()
1829 emitJumpTableTBInst(MI, MI->getOpcode() == ARM::JUMPTABLE_TBB ? 1 : 2); in emitInstruction()
1834 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
1842 unsigned Opc = MI->getOpcode() == ARM::t2TBB_JT ? ARM::t2TBB : ARM::t2TBH; in emitInstruction()
1844 OutStreamer->emitLabel(GetCPISymbol(MI->getOperand(3).getImm())); in emitInstruction()
1846 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
1847 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
1856 bool Is8Bit = MI->getOpcode() == ARM::tTBB_JT; in emitInstruction()
1857 Register Base = MI->getOperand(0).getReg(); in emitInstruction()
1858 Register Idx = MI->getOperand(1).getReg(); in emitInstruction()
1859 assert(MI->getOperand(1).isKill() && "We need the index register as scratch!"); in emitInstruction()
1881 // is 4-byte aligned, so we ensure we're 4 byte aligned here too. in emitInstruction()
1886 OutStreamer->emitCodeAlignment(Align(4), &getSubtargetInfo()); in emitInstruction()
1928 OutStreamer->emitLabel(GetCPISymbol(MI->getOperand(3).getImm())); in emitInstruction()
1942 unsigned Opc = MI->getOpcode() == ARM::BR_JTr ? in emitInstruction()
1946 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg())); in emitInstruction()
1961 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg())); in emitInstruction()
1962 TmpInst.addOperand(MCOperand::createImm(MI->getOperand(2).getImm())); in emitInstruction()
1974 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(0).getReg())); in emitInstruction()
1975 TmpInst.addOperand(MCOperand::createReg(MI->getOperand(1).getReg())); in emitInstruction()
1976 TmpInst.addOperand(MCOperand::createImm(MI->getOperand(2).getImm())); in emitInstruction()
1987 .addReg(MI->getOperand(0).getReg()) in emitInstruction()
1988 .addReg(MI->getOperand(1).getReg()) in emitInstruction()
1997 OutStreamer->emitZeros(MI->getOperand(1).getImm()); in emitInstruction()
2000 // Non-Darwin binutils don't yet support the "trap" mnemonic. in emitInstruction()
2002 if (!Subtarget->isTargetMachO()) { in emitInstruction()
2004 OutStreamer->AddComment("trap"); in emitInstruction()
2012 OutStreamer->AddComment("trap"); in emitInstruction()
2017 // Non-Darwin binutils don't yet support the "trap" mnemonic. in emitInstruction()
2019 if (!Subtarget->isTargetMachO()) { in emitInstruction()
2021 OutStreamer->AddComment("trap"); in emitInstruction()
2038 Register SrcReg = MI->getOperand(0).getReg(); in emitInstruction()
2039 Register ValReg = MI->getOperand(1).getReg(); in emitInstruction()
2041 OutStreamer->AddComment("eh_setjmp begin"); in emitInstruction()
2062 // The offset immediate is #4. The operand value is scaled by 4 for the in emitInstruction()
2083 OutStreamer->AddComment("eh_setjmp end"); in emitInstruction()
2092 OutStreamer->emitLabel(Label); in emitInstruction()
2104 Register SrcReg = MI->getOperand(0).getReg(); in emitInstruction()
2105 Register ValReg = MI->getOperand(1).getReg(); in emitInstruction()
2107 OutStreamer->AddComment("eh_setjmp begin"); in emitInstruction()
2145 OutStreamer->AddComment("eh_setjmp end"); in emitInstruction()
2161 Register SrcReg = MI->getOperand(0).getReg(); in emitInstruction()
2162 Register ScratchReg = MI->getOperand(1).getReg(); in emitInstruction()
2179 const MachineFunction &MF = *MI->getParent()->getParent(); in emitInstruction()
2210 assert(Subtarget->hasV4TOps()); in emitInstruction()
2224 Register SrcReg = MI->getOperand(0).getReg(); in emitInstruction()
2225 Register ScratchReg = MI->getOperand(1).getReg(); in emitInstruction()
2227 const MachineFunction &MF = *MI->getParent()->getParent(); in emitInstruction()
2233 // The offset immediate is #8. The operand value is scaled by 4 for the in emitInstruction()
2295 Register SrcReg = MI->getOperand(0).getReg(); in emitInstruction()
2373 ATS.emitARMWinCFIAllocStack(MI->getOperand(0).getImm(), in emitInstruction()
2374 MI->getOperand(1).getImm()); in emitInstruction()
2379 ATS.emitARMWinCFISaveRegMask(MI->getOperand(0).getImm(), in emitInstruction()
2380 MI->getOperand(1).getImm()); in emitInstruction()
2384 ATS.emitARMWinCFISaveSP(MI->getOperand(0).getImm()); in emitInstruction()
2388 ATS.emitARMWinCFISaveFRegs(MI->getOperand(0).getImm(), in emitInstruction()
2389 MI->getOperand(1).getImm()); in emitInstruction()
2393 ATS.emitARMWinCFISaveLR(MI->getOperand(0).getImm()); in emitInstruction()
2398 ATS.emitARMWinCFINop(MI->getOperand(0).getImm()); in emitInstruction()
2426 //===----------------------------------------------------------------------===//
2428 //===----------------------------------------------------------------------===//