48   if (MI.getOpcode() == ARC::LD_rs9 && (Offset >= 256 || Offset < -256)) {  in replaceFrameIndex()
50     BuildMI(MBB, II, DL, TII.get(ARC::LD_rlimm), Reg)  in replaceFrameIndex()
58   if (MI.getOpcode() != ARC::GETFI && (Offset >= 256 || Offset < -256)) {  in replaceFrameIndex()
60     BaseReg = RS->FindUnusedReg(&ARC::GPR32RegClass);  in replaceFrameIndex()
67           RS->scavengeRegisterBackwards(ARC::GPR32RegClass, II, false, SPAdj);  in replaceFrameIndex()
75     unsigned AddOpc = isUInt<6>(Offset) ? ARC::ADD_rru6 : ARC::ADD_rrlimm;  in replaceFrameIndex()
84   case ARC::LD_rs9:  in replaceFrameIndex()
87   case ARC::LDH_rs9:  in replaceFrameIndex()
88   case ARC::LDH_X_rs9:  in replaceFrameIndex()
91   case ARC::LDB_rs9:  in replaceFrameIndex()
92   case ARC::LDB_X_rs9:  in replaceFrameIndex()
99   case ARC::ST_rs9:  in replaceFrameIndex()
102   case ARC::STH_rs9:  in replaceFrameIndex()
105   case ARC::STB_rs9:  in replaceFrameIndex()
113   case ARC::GETFI:  in replaceFrameIndex()
116             TII.get(isUInt<6>(Offset) ? ARC::ADD_rru6 : ARC::ADD_rrlimm))  in replaceFrameIndex()
130     : ARCGenRegisterInfo(ARC::BLINK), ST(ST) {}  in ARCRegisterInfo()
144   Reserved.set(ARC::ILINK);  in getReservedRegs()
145   Reserved.set(ARC::SP);  in getReservedRegs()
146   Reserved.set(ARC::GP);  in getReservedRegs()
147   Reserved.set(ARC::R25);  in getReservedRegs()
148   Reserved.set(ARC::BLINK);  in getReservedRegs()
149   Reserved.set(ARC::FP);  in getReservedRegs()
208   assert(ARC::GPR32RegClass.contains(Reg) && "Unexpected register operand");  in eliminateFrameIndex()
227   return TFI->hasFP(MF) ? ARC::FP : ARC::SP;  in getFrameRegister()