Lines Matching refs:vdst

267   bits<8> vdst;
268 let Inst{7-0} = !if(p.EmitDst, vdst{7-0}, 0);
272 bits<8> vdst;
273 let Inst{7-0} = !if(p.EmitDst, vdst{7-0}, 0);
279 bits<8> vdst;
280 let Inst{7-0} = !if(P.EmitDst, vdst{7-0}, 0);
355 bits<8> vdst;
365 let Inst{7-0} = vdst;
378 bits<8> vdst;
389 let Inst{7-0} = vdst;
415 bits<8> vdst;
423 let Inst{7-0} = vdst;
443 bits<10> vdst; // VGPR or AGPR, but not SGPR. vdst{8} is not encoded in the instruction.
453 let Inst{7-0} = vdst{7-0};
458 let Inst{15} = vdst{9}; // acc(vdst)
772 bits<8> vdst;
776 let Inst{7-0} = !if(P.EmitDst, vdst{7-0}, 0);
805 bits<8> vdst;
809 let Inst{7-0} = vdst;
839 let Constraints = !if(P.NumSrcArgs, P.TieRegDPP # " = $vdst", "");
912 let Constraints = !if(P.NumSrcArgs, P.TieRegDPP # " = $vdst", "");
1000 let Constraints = !if(P.NumSrcArgs, P.TieRegDPP # " = $vdst", "");
1123 list<dag> ret3 = [(set P.DstVT:$vdst,
1128 list<dag> ret2 = [(set P.DstVT:$vdst,
1132 list<dag> ret1 = [(set P.DstVT:$vdst,
1148 list<dag> ret3 = [(set P.DstVT:$vdst,
1153 list<dag> ret2 = [(set P.DstVT:$vdst,
1158 list<dag> ret1 = [(set P.DstVT:$vdst,
1169 list<dag> ret3 = [(set P.DstVT:$vdst,
1174 list<dag> ret2 = [(set P.DstVT:$vdst,
1178 list<dag> ret1 = [(set P.DstVT:$vdst,
1187 list<dag> ret3 = [(set P.DstVT:$vdst,
1193 list<dag> ret2 = [(set P.DstVT:$vdst,
1198 list<dag> ret1 = [(set P.DstVT:$vdst,
1207 list<dag> ret = [(set P.DstVT:$vdst, (node P.Src0VT:$src0, P.Src1VT:$src1))];
1220 …list<dag> ret3 = [(set P.DstVT:$vdst, (DivergentFragOrOp<node, P>.ret (P.Src0VT src0), P.Src1VT:$s…
1222 …list<dag> ret2 = [(set P.DstVT:$vdst, (DivergentFragOrOp<node, P>.ret (P.Src0VT src0), P.Src1VT:$s…
1224 list<dag> ret1 = [(set P.DstVT:$vdst, (DivergentFragOrOp<node, P>.ret (P.Src0VT src0)))];
1231 …list<dag> ret3 = [(set P.DstVT:$vdst, (node P.Src0VT:$src0, P.Src1VT:$src1, P.Src2VT:$src2, i1:$cl…
1232 list<dag> ret2 = [(set P.DstVT:$vdst, (node P.Src0VT:$src0, P.Src1VT:$src1, i1:$clamp))];
1233 list<dag> ret1 = [(set P.DstVT:$vdst, (node P.Src0VT:$src0, i1:$clamp))];
1242 [(set P.DstVT:$vdst, (node P.Src0VT:$src0, P.Src1VT:$src1, P.Src2VT:$src2,
1245 … [(set P.DstVT:$vdst, (node P.Src0VT:$src0, P.Src1VT:$src1, P.Src2VT:$src2, i32:$idx,
1325 def _e64 : VOP3_Pseudo<OpName, P, [(set P.DstVT:$vdst,