Lines Matching +full:2 +full:x32 +full:- +full:bit

1 //===-- VOPDInstructions.td - Vector Instruction Definitions --------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
21   let Inst{8-0} = src0X;
22   let Inst{16-9} = vsrc1X;
23   let Inst{21-17} = opY;
24   let Inst{25-22} = opX;
25   let Inst{31-26} = 0x32; // encoding
26   let Inst{40-32} = src0Y;
27   let Inst{48-41} = vsrc1Y;
28   let Inst{55-49} = vdstY{7-1};
29   let Inst{63-56} = vdstX;
41   let Inst{8-0} = src0X;
42   let Inst{16-9} = vsrc1X;
43   let Inst{21-17} = opY;
44   let Inst{25-22} = opX;
45   let Inst{31-26} = 0x32; // encoding
46   let Inst{40-32} = src0Y;
47   let Inst{48-41} = vsrc1Y;
48   let Inst{55-49} = vdstY{7-1};
49   let Inst{63-56} = vdstX;
50   let Inst{95-64} = imm;
53 //===----------------------------------------------------------------------===//
55 //===----------------------------------------------------------------------===//
94   bit hasSrc2AccX = !or(!eq(VDX.Mnemonic, "v_fmac_f32"), !eq(VDX.Mnemonic, "v_dot2c_f32_f16"));
95   bit hasSrc2AccY = !or(!eq(VDY.Mnemonic, "v_fmac_f32"), !eq(VDY.Mnemonic, "v_dot2c_f32_f16"));
113       VOPDe<XasVC.VOPDOp{3-0}, YasVC.VOPDOp> {
114   let Inst{16-9} = !if (!eq(VDX.Mnemonic, "v_mov_b32"), 0x0, vsrc1X);
115   let Inst{48-41} = !if (!eq(VDY.Mnemonic, "v_mov_b32"), 0x0, vsrc1Y);
121       VOPD_MADKe<XasVC.VOPDOp{3-0}, YasVC.VOPDOp> {
122   let Inst{16-9} = !if (!eq(VDX.Mnemonic, "v_mov_b32"), 0x0, vsrc1X);
123   let Inst{48-41} = !if (!eq(VDY.Mnemonic, "v_mov_b32"), 0x0, vsrc1Y);
183       defvar OpName = "V_DUAL_" # !substr(x,2) # "_X_" # !substr(y,2) # Gen.Suffix;