Lines Matching refs:vdst

14   bits<8> vdst;
20   let Inst{24-17} = !if(P.EmitDst, vdst, 0);
26   bits<8>  vdst;
33   let Inst{24-17} = !if(P.EmitDst, vdst, 0);
40   bits<8> vdst;
45   let Inst{24-17} = !if(P.EmitDst, vdst{7-0}, 0);
51   bits<8> vdst;
56   let Inst{24-17} = !if(P.EmitDst, vdst{7-0}, 0);
132     [(set P.DstVT:$vdst,
138     [(set P.DstVT:$vdst, (node P.Src0VT:$src0, P.Src1VT:$src1))]);
282              (inst ps.Pfl.DstRC:$vdst, ps.Pfl.Src0RC32:$src0,
345              (inst ps.Pfl.DstRC:$vdst, ps.Pfl.Src0RC32:$src0,
352              (inst ps.Pfl.DstRC:$vdst, VOPDstS64orS32:$sdst,
380   field string Asm32 = "$vdst, $src0, $src1, $imm";
405   field string Asm32 = "$vdst, $src0, $imm, $src1";
539   let Asm64 = "$vdst, $src0, $src1$clamp";
544   let Asm32 = "$vdst, vcc, $src0, $src1";
545   let AsmVOP3Base = "$vdst, $sdst, $src0, $src1$clamp";
546 …let AsmSDWA = "$vdst, vcc, $src0_modifiers, $src1_modifiers$clamp $dst_sel $dst_unused $src0_sel $…
547 …let AsmSDWA9 = "$vdst, vcc, $src0_modifiers, $src1_modifiers$clamp $dst_sel $dst_unused $src0_sel …
548   let AsmDPP = "$vdst, vcc, $src0, $src1 $dpp_ctrl$row_mask$bank_mask$bound_ctrl";
549   let AsmDPP8 = "$vdst, vcc, $src0, $src1 $dpp8$fi";
561   let Outs32 = (outs DstRC:$vdst);
562   let Outs64 = (outs DstRC:$vdst, VOPDstS64orS32:$sdst);
571   let Asm32 = "$vdst, vcc, $src0, $src1, vcc";
572 …let AsmSDWA = "$vdst, vcc, $src0_modifiers, $src1_modifiers, vcc$clamp $dst_sel $dst_unused $src0_…
573 …let AsmSDWA9 = "$vdst, vcc, $src0_modifiers, $src1_modifiers, vcc$clamp $dst_sel $dst_unused $src0…
574   let AsmDPP = "$vdst, vcc, $src0, $src1, vcc $dpp_ctrl$row_mask$bank_mask$bound_ctrl";
575   let AsmDPP8 = "$vdst, vcc, $src0, $src1, vcc $dpp8$fi";
577   let Outs32 = (outs DstRC:$vdst);
578   let Outs64 = (outs DstRC:$vdst, VOPDstS64orS32:$sdst);
579   let AsmVOP3Base = "$vdst, $sdst, $src0, $src1, $src2$clamp";
613   let Asm32 = "$vdst, $src0, $src1";
614 …let AsmSDWA = "$vdst, $src0_modifiers, $src1_modifiers, vcc$clamp $dst_sel $dst_unused $src0_sel $…
615 …let AsmSDWA9 = "$vdst, $src0_modifiers, $src1_modifiers, vcc$clamp $dst_sel $dst_unused $src0_sel …
616 …let AsmDPP = "$vdst, $src0_modifiers, $src1_modifiers, vcc $dpp_ctrl$row_mask$bank_mask$bound_ctrl…
617   let AsmDPP8 = "$vdst, $src0, $src1, vcc $dpp8$fi";
619   let AsmVOP3Base = "$vdst, $src0_modifiers, $src1_modifiers, $src2";
621   let Outs32 = (outs DstRC:$vdst);
622   let Outs64 = (outs DstRC64:$vdst);
679   let Outs32 = (outs SReg_32:$vdst);
683   let Asm32 = " $vdst, $src0, $src1";
695   let Outs32 = (outs VGPR_32:$vdst);
699   let Asm32 = " $vdst, $src0, $src1";
749 let Constraints = "$vdst = $src2", DisableEncoding="$src2",
755 } // End Constraints = "$vdst = $src2", DisableEncoding="$src2",
784 let IsNeverUniform = 1, Constraints = "$vdst = $vdst_in", DisableEncoding="$vdst_in" in {
788 } // End IsNeverUniform, $vdst = $vdst_in, DisableEncoding $vdst_in
991 let Constraints = "$vdst = $src2",
1021 let Constraints = "$vdst = $src2", DisableEncoding="$src2",
1063 let Constraints = "$vdst = $src2",
1072 let Constraints = "$vdst = $src2",
1081     Constraints = "$vdst = $src2",
1088 let Constraints = "$vdst = $src2",
1270   bits<8> vdst;
1274   let Inst{24-17} = !if(p.EmitDst, vdst{7-0}, 0);
1309   bits<8> vdst;
1314   let Inst{24-17} = !if(p.EmitDst, vdst{7-0}, 0);
2065   bits<8> vdst;
2069   let Inst{24-17} = !if(P.EmitDst, vdst{7-0}, 0);