Lines Matching refs:Gen
112 class VOP2_Real_Gen <VOP2_Pseudo ps, GFXGen Gen, string real_name = ps.Mnemonic> :
113 VOP2_Real <ps, Gen.Subtarget, real_name> {
114 let AssemblerPredicate = Gen.AssemblerPredicate;
116 let DecoderNamespace = Gen.DecoderNamespace#
1292 class VOP2_DPP16_Gen<bits<6> op, VOP2_DPP_Pseudo ps, GFXGen Gen,
1294 VOP2_DPP16<op, ps, Gen.Subtarget, opName, p> {
1295 let AssemblerPredicate = Gen.AssemblerPredicate;
1297 let DecoderNamespace = Gen.DecoderNamespace#
1322 class VOP2_DPP8_Gen<bits<6> op, VOP2_Pseudo ps, GFXGen Gen,
1325 let AssemblerPredicate = Gen.AssemblerPredicate;
1327 let DecoderNamespace = Gen.DecoderNamespace#
1336 multiclass VOP2Only_Real_MADK<GFXGen Gen, bits<6> op> {
1337 def Gen.Suffix :
1338 VOP2_Real_Gen<!cast<VOP2_Pseudo>(NAME), Gen>,
1342 multiclass VOP2Only_Real_MADK_with_name<GFXGen Gen, bits<6> op, string asmName,
1344 def Gen.Suffix :
1345 VOP2_Real_Gen<!cast<VOP2_Pseudo>(opName), Gen>,
1352 multiclass VOP2_Real_e32<GFXGen Gen, bits<6> op> {
1353 def _e32#Gen.Suffix :
1354 VOP2_Real_Gen<!cast<VOP2_Pseudo>(NAME#"_e32"), Gen>,
1358 multiclass VOP2Only_Real_e32<GFXGen Gen, bits<6> op> {
1360 defm NAME: VOP2_Real_e32<Gen, op>;
1363 multiclass VOP2_Real_e64<GFXGen Gen, bits<6> op> {
1364 def _e64#Gen.Suffix :
1365 VOP3_Real_Gen<!cast<VOP3_Pseudo>(NAME#"_e64"), Gen>,
1369 multiclass VOP2_Real_dpp<GFXGen Gen, bits<6> op> {
1371 def _dpp#Gen.Suffix : VOP2_DPP16_Gen<op, !cast<VOP2_DPP_Pseudo>(NAME#"_dpp"), Gen>;
1374 multiclass VOP2_Real_dpp8<GFXGen Gen, bits<6> op> {
1376 def _dpp8#Gen.Suffix : VOP2_DPP8_Gen<op, !cast<VOP2_Pseudo>(NAME#"_e32"), Gen>;
1380 multiclass VOP2_Real_e32_with_name<GFXGen Gen, bits<6> op, string opName,
1383 def _e32#Gen.Suffix :
1384 VOP2_Real_Gen<ps, Gen, asmName>,
1390 multiclass VOP2_Real_e64_with_name<GFXGen Gen, bits<6> op, string opName,
1393 def _e64#Gen.Suffix :
1394 VOP3_Real_Gen<ps, Gen>,
1400 multiclass VOP2_Real_dpp_with_name<GFXGen Gen, bits<6> op, string opName,
1404 def _dpp#Gen.Suffix : VOP2_DPP16_Gen<op, !cast<VOP2_DPP_Pseudo>(opName#"_dpp"), Gen> {
1408 multiclass VOP2_Real_dpp8_with_name<GFXGen Gen, bits<6> op, string opName,
1412 def _dpp8#Gen.Suffix : VOP2_DPP8_Gen<op, ps, Gen> {
1418 multiclass VOP2be_Real_e32<GFXGen Gen, bits<6> op, string opName, string asmName> {
1420 def _e32#Gen.Suffix :
1421 VOP2_Real_Gen<ps, Gen>,
1426 multiclass VOP2be_Real_dpp<GFXGen Gen, bits<6> op, string opName, string asmName> {
1428 def _dpp#Gen.Suffix :
1429 VOP2_DPP16_Gen<op, !cast<VOP2_DPP_Pseudo>(opName#"_dpp"), Gen, asmName> {
1434 def _dpp_w32#Gen.Suffix :
1440 let AssemblerPredicate = Gen.AssemblerPredicate;
1441 let DecoderNamespace = Gen.DecoderNamespace;
1444 def _dpp_w64#Gen.Suffix :
1450 let AssemblerPredicate = Gen.AssemblerPredicate;
1451 let DecoderNamespace = Gen.DecoderNamespace;
1454 multiclass VOP2be_Real_dpp8<GFXGen Gen, bits<6> op, string opName, string asmName> {
1456 def _dpp8#Gen.Suffix :
1457 VOP2_DPP8_Gen<op, !cast<VOP2_Pseudo>(opName#"_e32"), Gen> {
1462 def _dpp8_w32#Gen.Suffix :
1468 let AssemblerPredicate = Gen.AssemblerPredicate;
1469 let DecoderNamespace = Gen.DecoderNamespace;
1472 def _dpp8_w64#Gen.Suffix :
1478 let AssemblerPredicate = Gen.AssemblerPredicate;
1479 let DecoderNamespace = Gen.DecoderNamespace;
1484 multiclass VOP2_Realtriple_e64<GFXGen Gen, bits<6> op> {
1485 defm NAME : VOP3_Realtriple<Gen, {0, 1, 0, 0, op{5-0}}, /*isSingle=*/ 0, NAME> ;
1488 multiclass VOP2_Realtriple_e64_with_name<GFXGen Gen, bits<6> op, string opName,
1490 defm NAME : VOP3_Realtriple_with_name<Gen, {0, 1, 0, 0, op{5-0}}, opName, asmName> ;
1493 multiclass VOP2be_Real<GFXGen Gen, bits<6> op, string opName, string asmName> :
1494 VOP2be_Real_e32<Gen, op, opName, asmName>,
1495 VOP3be_Realtriple<Gen, {0, 1, 0, 0, op{5-0}}, /*isSingle=*/ 0, opName, asmName>,
1496 VOP2be_Real_dpp<Gen, op, opName, asmName>,
1497 VOP2be_Real_dpp8<Gen, op, opName, asmName>;
1500 multiclass VOP2e_Real<GFXGen Gen, bits<6> op, string opName, string asmName> :
1501 VOP2_Real_e32<Gen, op>,
1502 VOP2_Realtriple_e64<Gen, op>,
1503 VOP2be_Real_dpp<Gen, op, opName, asmName>,
1504 VOP2be_Real_dpp8<Gen, op, opName, asmName>;
1506 multiclass VOP2Only_Real<GFXGen Gen, bits<6> op> :
1507 VOP2Only_Real_e32<Gen, op>,
1508 VOP2_Real_dpp<Gen, op>,
1509 VOP2_Real_dpp8<Gen, op>;
1511 multiclass VOP2_Real_FULL<GFXGen Gen, bits<6> op> :
1512 VOP2_Realtriple_e64<Gen, op>,
1513 VOP2_Real_e32<Gen, op>,
1514 VOP2_Real_dpp<Gen, op>,
1515 VOP2_Real_dpp8<Gen, op>;
1517 multiclass VOP2_Real_NO_VOP3_with_name<GFXGen Gen, bits<6> op, string opName,
1519 defm NAME : VOP2_Real_e32_with_name<Gen, op, opName, asmName, isSingle>,
1520 VOP2_Real_dpp_with_name<Gen, op, opName, asmName>,
1521 VOP2_Real_dpp8_with_name<Gen, op, opName, asmName>;
1523 def Gen.Suffix#"_alias" : AMDGPUMnemonicAlias<ps.Mnemonic, asmName> {
1524 let AssemblerPredicate = Gen.AssemblerPredicate;
1528 multiclass VOP2_Real_FULL_with_name<GFXGen Gen, bits<6> op, string opName,
1530 VOP2_Realtriple_e64_with_name<Gen, op, opName, asmName>,
1531 VOP2_Real_NO_VOP3_with_name<Gen, op, opName, asmName>;
1533 multiclass VOP2_Real_NO_DPP_with_name<GFXGen Gen, bits<6> op, string opName,
1535 defm NAME : VOP2_Real_e32_with_name<Gen, op, opName, asmName>,
1536 VOP2_Real_e64_with_name<Gen, op, opName, asmName>;
1538 def Gen.Suffix#"_alias" : AMDGPUMnemonicAlias<ps.Mnemonic, asmName> {
1539 let AssemblerPredicate = Gen.AssemblerPredicate;
1543 multiclass VOP2_Real_NO_DPP_with_alias<GFXGen Gen, bits<6> op, string alias> {
1544 defm NAME : VOP2_Real_e32<Gen, op>,
1545 VOP2_Real_e64<Gen, op>;
1546 def Gen.Suffix#"_alias" : AMDGPUMnemonicAlias<alias, NAME> {
1547 let AssemblerPredicate = Gen.AssemblerPredicate;