Lines Matching refs:Needs
128 char Needs = 0; member
134 char Needs = 0; member
278 << ", Needs = " << PrintState(BII.second.Needs) in printInfo()
284 dbgs() << " " << MI << " Needs = " << PrintState(III->second.Needs) in printInfo()
306 if ((II.Needs & Flag) == Flag) in markInstruction()
310 II.Needs |= Flag; in markInstruction()
540 BBI.Needs |= StateExact; in scanInstructions()
554 III.Needs |= StateStrictWQM; in scanInstructions()
569 BBI.Needs |= StateExact; in scanInstructions()
633 Instructions[&MI].Needs = StateWQM; in propagateInstruction()
634 II.Needs = StateWQM; in propagateInstruction()
638 if (II.Needs & StateWQM) { in propagateInstruction()
639 BI.Needs |= StateWQM; in propagateInstruction()
648 char InNeeds = (II.Needs & ~StateStrict) | II.OutNeeds; in propagateInstruction()
659 assert(!(II.Needs & StateExact)); in propagateInstruction()
661 if (II.Needs != 0) in propagateInstruction()
662 markInstructionUses(MI, II.Needs, Worklist); in propagateInstruction()
666 if (II.Needs & StateStrictWWM) in propagateInstruction()
667 BI.Needs |= StateStrictWWM; in propagateInstruction()
668 if (II.Needs & StateStrictWQM) in propagateInstruction()
669 BI.Needs |= StateStrictWQM; in propagateInstruction()
1250 if (!IsEntry && BI.Needs == StateWQM && BI.OutNeeds != StateExact) { in processBlock()
1288 char Needs = StateExact | StateWQM; // Strict mode is disabled by default. in processBlock() local
1305 if (III->second.Needs & StateStrictWWM) in processBlock()
1306 Needs = StateStrictWWM; in processBlock()
1307 else if (III->second.Needs & StateStrictWQM) in processBlock()
1308 Needs = StateStrictWQM; in processBlock()
1309 else if (III->second.Needs & StateWQM) in processBlock()
1310 Needs = StateWQM; in processBlock()
1312 Needs &= ~III->second.Disabled; in processBlock()
1318 Needs = StateExact | StateWQM | StateStrict; in processBlock()
1323 Needs = StateExact; in processBlock()
1329 Needs = StateWQM; in processBlock()
1331 Needs = StateExact; in processBlock()
1333 Needs = StateWQM | StateExact; in processBlock()
1337 if (!(Needs & State)) { in processBlock()
1339 if (State == StateStrictWWM || Needs == StateStrictWWM || in processBlock()
1340 State == StateStrictWQM || Needs == StateStrictWQM) { in processBlock()
1357 SaveSCC = (Needs & StateStrict) || ((Needs & StateWQM) && WQMFromExec); in processBlock()
1361 SaveSCC = !(Needs & StateWQM); in processBlock()
1368 prepareInsertion(MBB, First, II, Needs == StateWQM, SaveSCC); in processBlock()
1380 if (Needs & StateStrict) { in processBlock()
1382 assert(Needs == StateStrictWWM || Needs == StateStrictWQM); in processBlock()
1386 toStrictMode(MBB, Before, SavedNonStrictReg, Needs); in processBlock()
1387 State = Needs; in processBlock()
1390 if (State == StateWQM && (Needs & StateExact) && !(Needs & StateWQM)) { in processBlock()
1398 } else if (State == StateExact && (Needs & StateWQM) && in processBlock()
1399 !(Needs & StateExact)) { in processBlock()
1413 assert(Needs & State); in processBlock()
1418 if (Needs != (StateExact | StateWQM | StateStrict)) { in processBlock()
1419 if (Needs != (StateExact | StateWQM)) in processBlock()