Lines Matching refs:AMDGPU
440 case AMDGPU::EXEC: in markOperand()
441 case AMDGPU::EXEC_LO: in markOperand()
460 markDefs(MI, LR, Unit, AMDGPU::NoSubRegister, Flag, Worklist); in markOperand()
511 } else if (Opcode == AMDGPU::WQM) { in scanInstructions()
516 } else if (Opcode == AMDGPU::SOFT_WQM) { in scanInstructions()
519 } else if (Opcode == AMDGPU::STRICT_WWM) { in scanInstructions()
526 } else if (Opcode == AMDGPU::STRICT_WQM || in scanInstructions()
534 if (Opcode == AMDGPU::STRICT_WQM) { in scanInstructions()
548 } else if (Opcode == AMDGPU::LDS_PARAM_LOAD || in scanInstructions()
549 Opcode == AMDGPU::DS_PARAM_LOAD || in scanInstructions()
550 Opcode == AMDGPU::LDS_DIRECT_LOAD || in scanInstructions()
551 Opcode == AMDGPU::DS_DIRECT_LOAD) { in scanInstructions()
556 } else if (Opcode == AMDGPU::V_SET_INACTIVE_B32 || in scanInstructions()
557 Opcode == AMDGPU::V_SET_INACTIVE_B64) { in scanInstructions()
576 } else if (Opcode == AMDGPU::SI_PS_LIVE || in scanInstructions()
577 Opcode == AMDGPU::SI_LIVE_MASK) { in scanInstructions()
579 } else if (Opcode == AMDGPU::SI_KILL_I1_TERMINATOR || in scanInstructions()
580 Opcode == AMDGPU::SI_KILL_F32_COND_IMM_TERMINATOR || in scanInstructions()
581 Opcode == AMDGPU::SI_DEMOTE_I1) { in scanInstructions()
584 } else if (Opcode == AMDGPU::SI_INIT_EXEC || in scanInstructions()
585 Opcode == AMDGPU::SI_INIT_EXEC_FROM_INPUT) { in scanInstructions()
728 Register SaveReg = MRI->createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass); in saveSCC()
731 BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::COPY), SaveReg) in saveSCC()
732 .addReg(AMDGPU::SCC); in saveSCC()
734 BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::COPY), AMDGPU::SCC) in saveSCC()
756 case AMDGPU::S_AND_B32: in splitBlock()
757 NewOpcode = AMDGPU::S_AND_B32_term; in splitBlock()
759 case AMDGPU::S_AND_B64: in splitBlock()
760 NewOpcode = AMDGPU::S_AND_B64_term; in splitBlock()
762 case AMDGPU::S_MOV_B32: in splitBlock()
763 NewOpcode = AMDGPU::S_MOV_B32_term; in splitBlock()
765 case AMDGPU::S_MOV_B64: in splitBlock()
766 NewOpcode = AMDGPU::S_MOV_B64_term; in splitBlock()
790 BuildMI(*BB, BB->end(), DebugLoc(), TII->get(AMDGPU::S_BRANCH)) in splitBlock()
816 Opcode = AMDGPU::V_CMP_LG_F32_e64; in lowerKillF32()
819 Opcode = AMDGPU::V_CMP_GE_F32_e64; in lowerKillF32()
822 Opcode = AMDGPU::V_CMP_GT_F32_e64; in lowerKillF32()
825 Opcode = AMDGPU::V_CMP_LE_F32_e64; in lowerKillF32()
828 Opcode = AMDGPU::V_CMP_LT_F32_e64; in lowerKillF32()
831 Opcode = AMDGPU::V_CMP_EQ_F32_e64; in lowerKillF32()
834 Opcode = AMDGPU::V_CMP_O_F32_e64; in lowerKillF32()
837 Opcode = AMDGPU::V_CMP_U_F32_e64; in lowerKillF32()
841 Opcode = AMDGPU::V_CMP_NEQ_F32_e64; in lowerKillF32()
845 Opcode = AMDGPU::V_CMP_NLT_F32_e64; in lowerKillF32()
849 Opcode = AMDGPU::V_CMP_NLE_F32_e64; in lowerKillF32()
853 Opcode = AMDGPU::V_CMP_NGT_F32_e64; in lowerKillF32()
857 Opcode = AMDGPU::V_CMP_NGE_F32_e64; in lowerKillF32()
861 Opcode = AMDGPU::V_CMP_NLG_F32_e64; in lowerKillF32()
873 Register VCC = ST->isWave32() ? AMDGPU::VCC_LO : AMDGPU::VCC; in lowerKillF32()
876 Opcode = AMDGPU::getVOPe32(Opcode); in lowerKillF32()
896 BuildMI(MBB, MI, DL, TII->get(AMDGPU::SI_EARLY_TERMINATE_SCC0)); in lowerKillF32()
902 MachineInstr *NewTerm = BuildMI(MBB, MI, DL, TII->get(AMDGPU::S_BRANCH)) in lowerKillF32()
924 const bool IsDemote = IsWQM && (MI.getOpcode() == AMDGPU::SI_DEMOTE_I1); in lowerKillI1()
941 if (MI.getOpcode() == AMDGPU::SI_DEMOTE_I1) { in lowerKillI1()
945 NewTerm = BuildMI(MBB, MI, DL, TII->get(AMDGPU::S_BRANCH)) in lowerKillI1()
973 BuildMI(MBB, MI, DL, TII->get(AMDGPU::SI_EARLY_TERMINATE_SCC0)); in lowerKillI1()
991 unsigned MovOpc = ST->isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64; in lowerKillI1()
1054 case AMDGPU::SI_DEMOTE_I1: in lowerBlock()
1055 case AMDGPU::SI_KILL_I1_TERMINATOR: in lowerBlock()
1058 case AMDGPU::SI_KILL_F32_COND_IMM_TERMINATOR: in lowerBlock()
1087 LIS->getRegUnit(*TRI->regunits(MCRegister::from(AMDGPU::SCC)).begin()); in prepareInsertion()
1135 MO.getReg() == AMDGPU::EXEC_LO || MO.getReg() == AMDGPU::EXEC; in prepareInsertion()
1187 MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::COPY), Exec) in toWQM()
1206 MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::ENTER_STRICT_WWM), in toStrictMode()
1210 MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::ENTER_STRICT_WQM), in toStrictMode()
1229 MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::EXIT_STRICT_WWM), in fromStrictMode()
1233 MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::EXIT_STRICT_WQM), in fromStrictMode()
1268 if (II != IE && II->getOpcode() == AMDGPU::COPY && in processBlock()
1439 BuildMI(*MI->getParent(), MI, DL, TII->get(AMDGPU::COPY), Dest) in lowerLiveMaskQueries()
1463 return MO.isUse() && MO.getReg() == AMDGPU::EXEC; in lowerCopyInstrs()
1474 int Index = MI->findRegisterUseOperandIdx(AMDGPU::EXEC, /*TRI=*/nullptr); in lowerCopyInstrs()
1477 Index = MI->findRegisterUseOperandIdx(AMDGPU::EXEC, /*TRI=*/nullptr); in lowerCopyInstrs()
1479 MI->setDesc(TII->get(AMDGPU::COPY)); in lowerCopyInstrs()
1484 if (MI->getOpcode() == AMDGPU::V_SET_INACTIVE_B32 || in lowerCopyInstrs()
1485 MI->getOpcode() == AMDGPU::V_SET_INACTIVE_B64) { in lowerCopyInstrs()
1498 ? (unsigned)AMDGPU::COPY in lowerCopyInstrs()
1511 case AMDGPU::SI_DEMOTE_I1: in lowerKillInstrs()
1512 case AMDGPU::SI_KILL_I1_TERMINATOR: in lowerKillInstrs()
1515 case AMDGPU::SI_KILL_F32_COND_IMM_TERMINATOR: in lowerKillInstrs()
1529 if (MI.getOpcode() == AMDGPU::SI_INIT_EXEC) { in lowerInitExec()
1533 TII->get(IsWave32 ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64), in lowerInitExec()
1575 Register CountReg = MRI->createVirtualRegister(&AMDGPU::SGPR_32RegClass); in lowerInitExec()
1576 auto BfeMI = BuildMI(*MBB, FirstMI, DL, TII->get(AMDGPU::S_BFE_U32), CountReg) in lowerInitExec()
1581 TII->get(IsWave32 ? AMDGPU::S_BFM_B32 : AMDGPU::S_BFM_B64), Exec) in lowerInitExec()
1584 auto CmpMI = BuildMI(*MBB, FirstMI, DL, TII->get(AMDGPU::S_CMP_EQ_U32)) in lowerInitExec()
1589 TII->get(IsWave32 ? AMDGPU::S_CMOV_B32 : AMDGPU::S_CMOV_B64), in lowerInitExec()
1658 AndOpc = AMDGPU::S_AND_B32; in runOnMachineFunction()
1659 AndTermOpc = AMDGPU::S_AND_B32_term; in runOnMachineFunction()
1660 AndN2Opc = AMDGPU::S_ANDN2_B32; in runOnMachineFunction()
1661 XorOpc = AMDGPU::S_XOR_B32; in runOnMachineFunction()
1662 AndSaveExecOpc = AMDGPU::S_AND_SAVEEXEC_B32; in runOnMachineFunction()
1663 AndSaveExecTermOpc = AMDGPU::S_AND_SAVEEXEC_B32_term; in runOnMachineFunction()
1664 WQMOpc = AMDGPU::S_WQM_B32; in runOnMachineFunction()
1665 Exec = AMDGPU::EXEC_LO; in runOnMachineFunction()
1667 AndOpc = AMDGPU::S_AND_B64; in runOnMachineFunction()
1668 AndTermOpc = AMDGPU::S_AND_B64_term; in runOnMachineFunction()
1669 AndN2Opc = AMDGPU::S_ANDN2_B64; in runOnMachineFunction()
1670 XorOpc = AMDGPU::S_XOR_B64; in runOnMachineFunction()
1671 AndSaveExecOpc = AMDGPU::S_AND_SAVEEXEC_B64; in runOnMachineFunction()
1672 AndSaveExecTermOpc = AMDGPU::S_AND_SAVEEXEC_B64_term; in runOnMachineFunction()
1673 WQMOpc = AMDGPU::S_WQM_B64; in runOnMachineFunction()
1674 Exec = AMDGPU::EXEC; in runOnMachineFunction()
1693 BuildMI(Entry, EntryMI, DebugLoc(), TII->get(AMDGPU::COPY), LiveMaskReg) in runOnMachineFunction()
1731 LIS->removeAllRegUnitsForPhysReg(AMDGPU::SCC); in runOnMachineFunction()
1735 LIS->removeAllRegUnitsForPhysReg(AMDGPU::EXEC); in runOnMachineFunction()