24 ///   S_MOV_B64 LiveMask, EXEC
25 ///   S_WQM_B64 EXEC, EXEC
32 ///   S_MOV_B64 EXEC, Tmp
39 ///   S_MOV_B64 EXEC, Tmp
45 ///  S_MOV_B64 Tmp, EXEC
46 ///  S_WQM_B64 EXEC, EXEC
48 ///  S_MOV_B64 EXEC, Tmp
167   Register Exec;  member in __anonf56fbe7e0111::SIWholeQuadMode
440   case AMDGPU::EXEC:  in markOperand()
899       BuildMI(MBB, MI, DL, TII->get(AndN2Opc), Exec).addReg(Exec).addReg(VCC);  in lowerKillF32()
937                          .addReg(Exec);  in lowerKillI1()
955       // so exec mask needs to be factored in.  in lowerKillI1()
958           BuildMI(MBB, MI, DL, TII->get(XorOpc), TmpReg).add(Op).addReg(Exec);  in lowerKillI1()
976   // update EXEC to deactivate lanes as appropriate.  in lowerKillI1()
985     NewTerm = BuildMI(MBB, MI, DL, TII->get(AndOpc), Exec)  in lowerKillI1()
986                   .addReg(Exec)  in lowerKillI1()
992       NewTerm = BuildMI(MBB, &MI, DL, TII->get(MovOpc), Exec).addImm(0);  in lowerKillI1()
994       NewTerm = BuildMI(MBB, &MI, DL, TII->get(AndOpc), Exec)  in lowerKillI1()
995                     .addReg(Exec)  in lowerKillI1()
1000           BuildMI(MBB, &MI, DL, TII->get(Opcode), Exec).addReg(Exec).add(Op);  in lowerKillI1()
1128   // Move insertion point past any operations modifying EXEC.  in prepareInsertion()
1135           MO.getReg() == AMDGPU::EXEC_LO || MO.getReg() == AMDGPU::EXEC;  in prepareInsertion()
1172     MI = BuildMI(MBB, Before, DebugLoc(), TII->get(Opcode), Exec)  in toExact()
1173              .addReg(Exec)  in toExact()
1187     MI = BuildMI(MBB, Before, DebugLoc(), TII->get(AMDGPU::COPY), Exec)  in toWQM()
1190     MI = BuildMI(MBB, Before, DebugLoc(), TII->get(WQMOpc), Exec).addReg(Exec);  in toWQM()
1230                  Exec)  in fromStrictMode()
1234                  Exec)  in fromStrictMode()
1316         // If the instruction doesn't actually need a correct EXEC, then we can  in processBlock()
1355         // Exact/Strict -> WQM: save SCC if WQM mask is generated from exec  in processBlock()
1460       // Check that it already implicitly depends on exec (like all VALU movs  in lowerCopyInstrs()
1463         return MO.isUse() && MO.getReg() == AMDGPU::EXEC;  in lowerCopyInstrs()
1466       // Remove early-clobber and exec dependency from simple SGPR copies.  in lowerCopyInstrs()
1474       int Index = MI->findRegisterUseOperandIdx(AMDGPU::EXEC, /*TRI=*/nullptr);  in lowerCopyInstrs()
1477         Index = MI->findRegisterUseOperandIdx(AMDGPU::EXEC, /*TRI=*/nullptr);  in lowerCopyInstrs()
1534                 Exec)  in lowerInitExec()
1544   // Extract the thread count from an SGPR input and set EXEC accordingly.  in lowerInitExec()
1548   // S_BFM_B64 exec, count, 0  in lowerInitExec()
1550   // S_CMOV_B64 exec, -1  in lowerInitExec()
1581               TII->get(IsWave32 ? AMDGPU::S_BFM_B32 : AMDGPU::S_BFM_B64), Exec)  in lowerInitExec()
1590               Exec)  in lowerInitExec()
1612 /// for instructions that depend on EXEC.
1665     Exec = AMDGPU::EXEC_LO;  in runOnMachineFunction()
1674     Exec = AMDGPU::EXEC;  in runOnMachineFunction()
1680   LiveMaskReg = Exec;  in runOnMachineFunction()
1694             .addReg(Exec);  in runOnMachineFunction()
1709     auto MI = BuildMI(Entry, EntryMI, DebugLoc(), TII->get(WQMOpc), Exec)  in runOnMachineFunction()
1710                   .addReg(Exec);  in runOnMachineFunction()
1725   if (LiveMaskReg != Exec)  in runOnMachineFunction()
1733   // If we performed any kills then recompute EXEC  in runOnMachineFunction()
1735     LIS->removeAllRegUnitsForPhysReg(AMDGPU::EXEC);  in runOnMachineFunction()