Lines Matching refs:SubReg
55 Register Reg, unsigned SubReg) const;
57 unsigned SubReg) const;
59 unsigned SubReg) const;
581 unsigned SubReg) const { in instAccessReg()
590 LaneBitmask Overlap = TRI->getSubRegIndexLaneMask(SubReg) & in instAccessReg()
600 unsigned SubReg) const { in instReadsReg()
601 return instAccessReg(MI->uses(), Reg, SubReg); in instReadsReg()
605 unsigned SubReg) const { in instModifiesReg()
606 return instAccessReg(MI->defs(), Reg, SubReg); in instModifiesReg()
742 .addDef(X1.Reg, 0, X1.SubReg) in matchSwap()
743 .addDef(Y1.Reg, 0, Y1.SubReg) in matchSwap()
744 .addReg(Y1.Reg, 0, Y1.SubReg) in matchSwap()
745 .addReg(X1.Reg, 0, X1.SubReg).getInstr(); in matchSwap()