Lines Matching refs:AMDGPU
93 int Src0Idx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::src0); in foldImmediates()
152 if (AMDGPU::VGPR_32RegClass.contains(Reg) && in shouldShrinkTrue16()
153 !AMDGPU::VGPR_32_Lo128RegClass.contains(Reg)) in shouldShrinkTrue16()
207 return AMDGPU::V_NOT_B32_e32; in canModifyToInlineImmOp32()
212 return Scalar ? AMDGPU::S_BREV_B32 : AMDGPU::V_BFREV_B32_e32; in canModifyToInlineImmOp32()
251 int SOPKOpc = AMDGPU::getSOPKOp(MI.getOpcode()); in shrinkScalarCompare()
257 if (SOPKOpc == AMDGPU::S_CMPK_EQ_U32 || SOPKOpc == AMDGPU::S_CMPK_LG_U32) { in shrinkScalarCompare()
261 SOPKOpc = (SOPKOpc == AMDGPU::S_CMPK_EQ_U32) ? in shrinkScalarCompare()
262 AMDGPU::S_CMPK_EQ_I32 : AMDGPU::S_CMPK_LG_I32; in shrinkScalarCompare()
284 const AMDGPU::MIMGInfo *Info = AMDGPU::getMIMGInfo(MI.getOpcode()); in shrinkMIMG()
290 case AMDGPU::MIMGEncGfx10NSA: in shrinkMIMG()
291 NewEncoding = AMDGPU::MIMGEncGfx10Default; in shrinkMIMG()
293 case AMDGPU::MIMGEncGfx11NSA: in shrinkMIMG()
294 NewEncoding = AMDGPU::MIMGEncGfx11Default; in shrinkMIMG()
301 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vaddr0); in shrinkMIMG()
306 RC = &AMDGPU::VReg_64RegClass; in shrinkMIMG()
308 RC = &AMDGPU::VReg_96RegClass; in shrinkMIMG()
310 RC = &AMDGPU::VReg_128RegClass; in shrinkMIMG()
312 RC = &AMDGPU::VReg_160RegClass; in shrinkMIMG()
314 RC = &AMDGPU::VReg_192RegClass; in shrinkMIMG()
316 RC = &AMDGPU::VReg_224RegClass; in shrinkMIMG()
318 RC = &AMDGPU::VReg_256RegClass; in shrinkMIMG()
320 RC = &AMDGPU::VReg_288RegClass; in shrinkMIMG()
322 RC = &AMDGPU::VReg_320RegClass; in shrinkMIMG()
324 RC = &AMDGPU::VReg_352RegClass; in shrinkMIMG()
326 RC = &AMDGPU::VReg_384RegClass; in shrinkMIMG()
328 RC = &AMDGPU::VReg_512RegClass; in shrinkMIMG()
365 int TFEIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::tfe); in shrinkMIMG()
366 int LWEIdx = AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::lwe); in shrinkMIMG()
385 unsigned NewOpcode = AMDGPU::getMIMGOpcode(Info->BaseOpcode, NewEncoding, in shrinkMIMG()
397 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vdata), in shrinkMIMG()
418 MachineOperand &Src0 = *TII->getNamedOperand(MI, AMDGPU::OpName::src0); in shrinkMadFma()
419 MachineOperand &Src1 = *TII->getNamedOperand(MI, AMDGPU::OpName::src1); in shrinkMadFma()
420 MachineOperand &Src2 = *TII->getNamedOperand(MI, AMDGPU::OpName::src2); in shrinkMadFma()
421 unsigned NewOpcode = AMDGPU::INSTRUCTION_LIST_END; in shrinkMadFma()
437 case AMDGPU::V_MAD_F32_e64: in shrinkMadFma()
438 NewOpcode = AMDGPU::V_MADAK_F32; in shrinkMadFma()
440 case AMDGPU::V_FMA_F32_e64: in shrinkMadFma()
441 NewOpcode = AMDGPU::V_FMAAK_F32; in shrinkMadFma()
443 case AMDGPU::V_MAD_F16_e64: in shrinkMadFma()
444 NewOpcode = AMDGPU::V_MADAK_F16; in shrinkMadFma()
446 case AMDGPU::V_FMA_F16_e64: in shrinkMadFma()
447 case AMDGPU::V_FMA_F16_gfx9_e64: in shrinkMadFma()
448 NewOpcode = ST->hasTrue16BitInsts() ? AMDGPU::V_FMAAK_F16_t16 in shrinkMadFma()
449 : AMDGPU::V_FMAAK_F16; in shrinkMadFma()
466 case AMDGPU::V_MAD_F32_e64: in shrinkMadFma()
467 NewOpcode = AMDGPU::V_MADMK_F32; in shrinkMadFma()
469 case AMDGPU::V_FMA_F32_e64: in shrinkMadFma()
470 NewOpcode = AMDGPU::V_FMAMK_F32; in shrinkMadFma()
472 case AMDGPU::V_MAD_F16_e64: in shrinkMadFma()
473 NewOpcode = AMDGPU::V_MADMK_F16; in shrinkMadFma()
475 case AMDGPU::V_FMA_F16_e64: in shrinkMadFma()
476 case AMDGPU::V_FMA_F16_gfx9_e64: in shrinkMadFma()
477 NewOpcode = ST->hasTrue16BitInsts() ? AMDGPU::V_FMAMK_F16_t16 in shrinkMadFma()
478 : AMDGPU::V_FMAMK_F16; in shrinkMadFma()
483 if (NewOpcode == AMDGPU::INSTRUCTION_LIST_END) in shrinkMadFma()
486 if (AMDGPU::isTrue16Inst(NewOpcode) && !shouldShrinkTrue16(MI)) in shrinkMadFma()
518 AMDGPU::isInlinableLiteral32(SrcImm->getImm(), ST->hasInv2PiInlineImm())) in shrinkScalarLogicOp()
524 if (Opc == AMDGPU::S_AND_B32) { in shrinkScalarLogicOp()
527 Opc = AMDGPU::S_BITSET0_B32; in shrinkScalarLogicOp()
528 } else if (AMDGPU::isInlinableLiteral32(~Imm, ST->hasInv2PiInlineImm())) { in shrinkScalarLogicOp()
530 Opc = AMDGPU::S_ANDN2_B32; in shrinkScalarLogicOp()
532 } else if (Opc == AMDGPU::S_OR_B32) { in shrinkScalarLogicOp()
535 Opc = AMDGPU::S_BITSET1_B32; in shrinkScalarLogicOp()
536 } else if (AMDGPU::isInlinableLiteral32(~Imm, ST->hasInv2PiInlineImm())) { in shrinkScalarLogicOp()
538 Opc = AMDGPU::S_ORN2_B32; in shrinkScalarLogicOp()
540 } else if (Opc == AMDGPU::S_XOR_B32) { in shrinkScalarLogicOp()
541 if (AMDGPU::isInlinableLiteral32(~Imm, ST->hasInv2PiInlineImm())) { in shrinkScalarLogicOp()
543 Opc = AMDGPU::S_XNOR_B32; in shrinkScalarLogicOp()
560 if (Opc == AMDGPU::S_BITSET0_B32 || in shrinkScalarLogicOp()
561 Opc == AMDGPU::S_BITSET1_B32) { in shrinkScalarLogicOp()
633 TII->get(AMDGPU::IMPLICIT_DEF), Op.getReg()); in dropInstructionKeepingImpDefs()
659 assert(MovT.getOpcode() == AMDGPU::V_MOV_B32_e32 || in matchSwap()
660 MovT.getOpcode() == AMDGPU::COPY); in matchSwap()
686 if ((MovY->getOpcode() != AMDGPU::V_MOV_B32_e32 && in matchSwap()
687 MovY->getOpcode() != AMDGPU::COPY) || in matchSwap()
716 (I->getOpcode() != AMDGPU::V_MOV_B32_e32 && in matchSwap()
717 I->getOpcode() != AMDGPU::COPY) || in matchSwap()
741 TII->get(AMDGPU::V_SWAP_B32)) in matchSwap()
746 if (MovX->hasRegisterImplicitUseOperand(AMDGPU::EXEC)) { in matchSwap()
779 MachineOperand *Op = TII->getNamedOperand(MI, AMDGPU::OpName::sdst); in tryReplaceDeadSDST()
786 Op->setReg(ST->isWave32() ? AMDGPU::SGPR_NULL : AMDGPU::SGPR_NULL64); in tryReplaceDeadSDST()
800 unsigned VCCReg = ST->isWave32() ? AMDGPU::VCC_LO : AMDGPU::VCC; in runOnMachineFunction()
813 if (MI.getOpcode() == AMDGPU::V_MOV_B32_e32) { in runOnMachineFunction()
835 if (ST->hasSwap() && (MI.getOpcode() == AMDGPU::V_MOV_B32_e32 || in runOnMachineFunction()
836 MI.getOpcode() == AMDGPU::COPY)) { in runOnMachineFunction()
844 if (MI.getOpcode() == AMDGPU::S_ADD_I32 || in runOnMachineFunction()
845 MI.getOpcode() == AMDGPU::S_MUL_I32) { in runOnMachineFunction()
866 unsigned Opc = (MI.getOpcode() == AMDGPU::S_ADD_I32) ? in runOnMachineFunction()
867 AMDGPU::S_ADDK_I32 : AMDGPU::S_MULK_I32; in runOnMachineFunction()
883 if (MI.getOpcode() == AMDGPU::S_MOV_B32) { in runOnMachineFunction()
891 MI.setDesc(TII->get(AMDGPU::S_MOVK_I32)); in runOnMachineFunction()
904 if (MI.getOpcode() == AMDGPU::S_AND_B32 || in runOnMachineFunction()
905 MI.getOpcode() == AMDGPU::S_OR_B32 || in runOnMachineFunction()
906 MI.getOpcode() == AMDGPU::S_XOR_B32) { in runOnMachineFunction()
922 if (MI.getOpcode() == AMDGPU::V_MAD_F32_e64 || in runOnMachineFunction()
923 MI.getOpcode() == AMDGPU::V_FMA_F32_e64 || in runOnMachineFunction()
924 MI.getOpcode() == AMDGPU::V_MAD_F16_e64 || in runOnMachineFunction()
925 MI.getOpcode() == AMDGPU::V_FMA_F16_e64 || in runOnMachineFunction()
926 MI.getOpcode() == AMDGPU::V_FMA_F16_gfx9_e64) { in runOnMachineFunction()
948 int Op32 = AMDGPU::getVOPe32(MI.getOpcode()); in runOnMachineFunction()
974 if (Op32 == AMDGPU::V_CNDMASK_B32_e32) { in runOnMachineFunction()
978 TII->getNamedOperand(MI, AMDGPU::OpName::src2); in runOnMachineFunction()
992 AMDGPU::OpName::sdst); in runOnMachineFunction()
1006 AMDGPU::OpName::src2); in runOnMachineFunction()
1026 if (ST->hasTrue16BitInsts() && AMDGPU::isTrue16Inst(MI.getOpcode()) && in runOnMachineFunction()