Lines Matching full:shrink

1 //===-- SIShrinkInstructions.cpp - Shrink Instructions --------------------===//
18 #define DEBUG_TYPE "si-shrink-instructions"
67   StringRef getPassName() const override { return "SI Shrink Instructions"; }  in getPassName()
78                 "SI Shrink Instructions", false, false)
143 /// Do not shrink the instruction if its registers are not expressible in the
150       assert(!Reg.isVirtual() && "Prior checks should ensure we only shrink "  in shouldShrinkTrue16()
282 // Shrink NSA encoded instructions with contiguous VGPRs to non-NSA encoding.
402 // Shrink MAD to MADAK/MADMK and FMA to FMAAK/FMAMK.
405   // there is no reason to try to shrink them.  in shrinkMadFma()
504 /// Attempt to shrink AND/OR/XOR operations requiring non-inlineable literals.
903       // Shrink scalar logic operations.  in runOnMachineFunction()
932         // If there is no chance we will shrink it and use VCC as sdst to get  in runOnMachineFunction()
939         // Try commuting the instruction and see if that enables us to shrink  in runOnMachineFunction()
964             // will run this pass again after RA and shrink it if it outputs to  in runOnMachineFunction()
975         // We shrink V_CNDMASK_B32_e64 using regalloc hints like we do for VOPC  in runOnMachineFunction()
1030       // We can shrink this instruction  in runOnMachineFunction()