Lines Matching refs:IsKill
84 bool IsKill; member
120 bool IsKill, int Index, RegScavenger *RS) in SGPRSpillBuilder()
121 : SuperReg(Reg), MI(MI), IsKill(IsKill), DL(MI->getDebugLoc()), in SGPRSpillBuilder()
1216 unsigned ValueReg, bool IsKill) { in spillVGPRtoAGPR() argument
1240 .addReg(Src, getKillRegState(IsKill)); in spillVGPRtoAGPR()
1248 .addReg(Src, getKillRegState(IsKill)); in spillVGPRtoAGPR()
1331 unsigned LoadStoreOp, int Index, Register ValueReg, bool IsKill, in buildSpillLoadStore() argument
1554 SrcDstRegState |= getKillRegState(IsKill); in buildSpillLoadStore()
1579 auto MIB = spillVGPRtoAGPR(ST, MBB, MI, Index, Lane, Sub, IsKill); in buildSpillLoadStore()
1624 .addReg(SubReg, getKillRegState(IsKill)); in buildSpillLoadStore()
1645 .addReg(SubReg, getDefRegState(!IsStore) | getKillRegState(IsKill)); in buildSpillLoadStore()
1729 bool IsKill) const { in buildVGPRSpillLoadStore()
1753 buildSpillLoadStore(*SB.MBB, SB.MI, SB.DL, Opc, Index, SB.TmpVGPR, IsKill, in buildVGPRSpillLoadStore()
1790 bool UseKill = SB.IsKill && IsLastSubreg; in spillSGPR()
1824 unsigned SubKillState = getKillRegState((SB.NumSubRegs == 1) && SB.IsKill); in spillSGPR()
1862 SuperKillState |= getKillRegState(SB.IsKill); in spillSGPR()
1970 unsigned SubKillState = getKillRegState((SB.NumSubRegs == 1) && SB.IsKill); in spillEmergencySGPR()
1996 SuperKillState |= getKillRegState(SB.IsKill); in spillEmergencySGPR()