104     if (Src.isReg() && Src.getReg() == Exec)  in isCopyFromExec()
105       return MI.getOperand(0).getReg();  in isCopyFromExec()
119     if (Dst.isReg() && Dst.getReg() == Exec && MI.getOperand(1).isReg())  in isCopyToExec()
120       return MI.getOperand(1).getReg();  in isCopyToExec()
144     if (Src1.isReg() && Src1.getReg() == AMDGPU::EXEC)  in isLogicalOpOnExec()
145       return MI.getOperand(0).getReg();  in isLogicalOpOnExec()
147     if (Src2.isReg() && Src2.getReg() == AMDGPU::EXEC)  in isLogicalOpOnExec()
148       return MI.getOperand(0).getReg();  in isLogicalOpOnExec()
160     if (Src1.isReg() && Src1.getReg() == AMDGPU::EXEC_LO)  in isLogicalOpOnExec()
161       return MI.getOperand(0).getReg();  in isLogicalOpOnExec()
163     if (Src2.isReg() && Src2.getReg() == AMDGPU::EXEC_LO)  in isLogicalOpOnExec()
164       return MI.getOperand(0).getReg();  in isLogicalOpOnExec()
361             Register Candidate = MO.getReg();  in findInstrBackwards()
472     Register CopyFromExec = CopyFromExecInst->getOperand(0).getReg();  in optimizeExecSequence()
541     if (Src0.isReg() && Src0.getReg() == CopyFromExec) {  in optimizeExecSequence()
543     } else if (Src1.isReg() && Src1.getReg() == CopyFromExec) {  in optimizeExecSequence()
558         .addReg(OtherOp->getReg());  in optimizeExecSequence()
586   Register MoveDest = SaveExecInstr.getOperand(0).getReg();  in optimizeVCMPSaveExecSequence()
618     MRI->clearKillFlags(Src0->getReg());  in optimizeVCMPSaveExecSequence()
620     MRI->clearKillFlags(Src1->getReg());  in optimizeVCMPSaveExecSequence()
649   Register SaveExecDest = MI.getOperand(0).getReg();  in tryRecordVCmpxAndSaveexecSequence()
670                Check->modifiesRegister(SaveExecSrc0->getReg(), TRI);  in tryRecordVCmpxAndSaveexecSequence()
672       {Exec, SaveExecSrc0->getReg()});  in tryRecordVCmpxAndSaveexecSequence()
682   if (Src0->isReg() && TRI->isSGPRReg(*MRI, Src0->getReg()) &&  in tryRecordVCmpxAndSaveexecSequence()
683       MI.modifiesRegister(Src0->getReg(), TRI))  in tryRecordVCmpxAndSaveexecSequence()
687   if (Src1->isReg() && TRI->isSGPRReg(*MRI, Src1->getReg()) &&  in tryRecordVCmpxAndSaveexecSequence()
688       MI.modifiesRegister(Src1->getReg(), TRI))  in tryRecordVCmpxAndSaveexecSequence()
695   if (isLiveOut(*VCmp->getParent(), VCmpDest->getReg()))  in tryRecordVCmpxAndSaveexecSequence()
700   if (isRegisterInUseBetween(*VCmp, MI, VCmpDest->getReg(), false, true) ||  in tryRecordVCmpxAndSaveexecSequence()
701       isRegisterInUseAfter(MI, VCmpDest->getReg()))  in tryRecordVCmpxAndSaveexecSequence()
710     NonDefRegs.push_back(Src0->getReg());  in tryRecordVCmpxAndSaveexecSequence()
713     NonDefRegs.push_back(Src1->getReg());  in tryRecordVCmpxAndSaveexecSequence()
738     if (XorDst.isReg() && XorDst.getReg() == Exec && XorSrc0.isReg() &&  in tryRecordOrSaveexecXorSequence()
740         (XorSrc0.getReg() == Exec || XorSrc1.getReg() == Exec)) {  in tryRecordOrSaveexecXorSequence()
754         if ((XorSrc0.getReg() == Exec && XorSrc1.getReg() == OrDst.getReg()) ||  in tryRecordOrSaveexecXorSequence()
755             (XorSrc0.getReg() == OrDst.getReg() && XorSrc1.getReg() == Exec)) {  in tryRecordOrSaveexecXorSequence()
777             TII->get(Andn2Opcode), Or->getOperand(0).getReg())  in optimizeOrSaveexecXorSequences()
778         .addReg(Or->getOperand(1).getReg());  in optimizeOrSaveexecXorSequences()