143     const MachineOperand &Src1 = MI.getOperand(1);  in isLogicalOpOnExec()  local
144     if (Src1.isReg() && Src1.getReg() == AMDGPU::EXEC)  in isLogicalOpOnExec()
159     const MachineOperand &Src1 = MI.getOperand(1);  in isLogicalOpOnExec()  local
160     if (Src1.isReg() && Src1.getReg() == AMDGPU::EXEC_LO)  in isLogicalOpOnExec()
537     MachineOperand &Src1 = SaveExecInst->getOperand(2);  in optimizeExecSequence()  local
542       OtherOp = &Src1;  in optimizeExecSequence()
543     } else if (Src1.isReg() && Src1.getReg() == CopyFromExec) {  in optimizeExecSequence()
584   MachineOperand *Src1 = TII->getNamedOperand(VCmp, AMDGPU::OpName::src1);  in optimizeVCMPSaveExecSequence()  local
612   Builder.add(*Src1);  in optimizeVCMPSaveExecSequence()
619   if (Src1->isReg())  in optimizeVCMPSaveExecSequence()
620     MRI->clearKillFlags(Src1->getReg());  in optimizeVCMPSaveExecSequence()
686   MachineOperand *Src1 = TII->getNamedOperand(*VCmp, AMDGPU::OpName::src1);  in tryRecordVCmpxAndSaveexecSequence()  local
687   if (Src1->isReg() && TRI->isSGPRReg(*MRI, Src1->getReg()) &&  in tryRecordVCmpxAndSaveexecSequence()
688       MI.modifiesRegister(Src1->getReg(), TRI))  in tryRecordVCmpxAndSaveexecSequence()
712   if (Src1->isReg())  in tryRecordVCmpxAndSaveexecSequence()
713     NonDefRegs.push_back(Src1->getReg());  in tryRecordVCmpxAndSaveexecSequence()