32   MCRegister Exec;  member in __anonddf153af0111::SIOptimizeExecMasking
59                                     MachineInstr &VCmp, MCRegister Exec) const;
104     if (Src.isReg() && Src.getReg() == Exec)  in isCopyFromExec()
119     if (Dst.isReg() && Dst.getReg() == Exec && MI.getOperand(1).isReg())  in isCopyToExec()
455         PrepareExecInst->getOperand(0).setReg(Exec);  in optimizeExecSequence()
480       if (SaveExecInst && J->readsRegister(Exec, TRI)) {  in optimizeExecSequence()
564       OtherInst->substituteRegister(CopyToExec, Exec, AMDGPU::NoSubRegister,  in optimizeExecSequence()
577     MachineInstr &SaveExecInstr, MachineInstr &VCmp, MCRegister Exec) const {  in optimizeVCMPSaveExecSequence()
594         .addReg(Exec);  in optimizeVCMPSaveExecSequence()
672       {Exec, SaveExecSrc0->getReg()});  in tryRecordVCmpxAndSaveexecSequence()
738     if (XorDst.isReg() && XorDst.getReg() == Exec && XorSrc0.isReg() &&  in tryRecordOrSaveexecXorSequence()
740         (XorSrc0.getReg() == Exec || XorSrc1.getReg() == Exec)) {  in tryRecordOrSaveexecXorSequence()
754         if ((XorSrc0.getReg() == Exec && XorSrc1.getReg() == OrDst.getReg()) ||  in tryRecordOrSaveexecXorSequence()
755             (XorSrc0.getReg() == OrDst.getReg() && XorSrc1.getReg() == Exec)) {  in tryRecordOrSaveexecXorSequence()
798   Exec = TRI->getExec();  in runOnMachineFunction()
820       if (MI.modifiesRegister(Exec, TRI)) {  in runOnMachineFunction()
833     Changed |= optimizeVCMPSaveExecSequence(*SaveExecInstr, *VCmpInstr, Exec);  in runOnMachineFunction()