22 #define DEBUG_TYPE "si-optimize-exec-masking"
32   MCRegister Exec;  member in __anonddf153af0111::SIOptimizeExecMasking
59                                     MachineInstr &VCmp, MCRegister Exec) const;
74     return "SI optimize exec mask operations";  in getPassName()
86                       "SI optimize exec mask operations", false, false)
89                     "SI optimize exec mask operations", false, false)
95 /// If \p MI is a copy from exec, return the register copied to.
104     if (Src.isReg() && Src.getReg() == Exec)  in isCopyFromExec()
112 /// If \p MI is a copy to exec, return the register copied from.
119     if (Dst.isReg() && Dst.getReg() == Exec && MI.getOperand(1).isReg())  in isCopyToExec()
131 /// If \p MI is a logical operation on an exec value,
144     if (Src1.isReg() && Src1.getReg() == AMDGPU::EXEC)  in isLogicalOpOnExec()
147     if (Src2.isReg() && Src2.getReg() == AMDGPU::EXEC)  in isLogicalOpOnExec()
411 // inserted for the saved copy of exec.
413 //     x = copy exec
415 //     exec = copy z
427     // It's possible to see other terminator copies after the exec copy. This  in optimizeExecSequence()
450       // Fold exec = COPY (S_AND_B64 reg, exec) -> exec = S_AND_B64 reg, exec  in optimizeExecSequence()
453         LLVM_DEBUG(dbgs() << "Fold exec copy: " << *PrepareExecInst);  in optimizeExecSequence()
455         PrepareExecInst->getOperand(0).setReg(Exec);  in optimizeExecSequence()
468       LLVM_DEBUG(dbgs() << "Exec copy source register is live out\n");  in optimizeExecSequence()
480       if (SaveExecInst && J->readsRegister(Exec, TRI)) {  in optimizeExecSequence()
481         LLVM_DEBUG(dbgs() << "exec read prevents saveexec: " << *J << '\n');  in optimizeExecSequence()
504           LLVM_DEBUG(dbgs() << "Found save exec op: " << *SaveExecInst << '\n');  in optimizeExecSequence()
507         LLVM_DEBUG(dbgs() << "Instruction does not read exec copy: " << *J  in optimizeExecSequence()
516         // %sgpr0_sgpr1 = COPY %exec  in optimizeExecSequence()
534     LLVM_DEBUG(dbgs() << "Insert save exec op: " << *SaveExecInst << '\n');  in optimizeExecSequence()
564       OtherInst->substituteRegister(CopyToExec, Exec, AMDGPU::NoSubRegister,  in optimizeExecSequence()
577     MachineInstr &SaveExecInstr, MachineInstr &VCmp, MCRegister Exec) const {  in optimizeVCMPSaveExecSequence()
594         .addReg(Exec);  in optimizeVCMPSaveExecSequence()
597   // Omit dst as V_CMPX is implicitly writing to EXEC.  in optimizeVCMPSaveExecSequence()
665   // operand without any write to Exec or the saveexec input operand inbetween.  in tryRecordVCmpxAndSaveexecSequence()
672       {Exec, SaveExecSrc0->getReg()});  in tryRecordVCmpxAndSaveexecSequence()
726 // s_xor exec, exec, s_o
738     if (XorDst.isReg() && XorDst.getReg() == Exec && XorSrc0.isReg() &&  in tryRecordOrSaveexecXorSequence()
740         (XorSrc0.getReg() == Exec || XorSrc1.getReg() == Exec)) {  in tryRecordOrSaveexecXorSequence()
754         if ((XorSrc0.getReg() == Exec && XorSrc1.getReg() == OrDst.getReg()) ||  in tryRecordOrSaveexecXorSequence()
755             (XorSrc0.getReg() == OrDst.getReg() && XorSrc1.getReg() == Exec)) {  in tryRecordOrSaveexecXorSequence()
798   Exec = TRI->getExec();  in runOnMachineFunction()
820       if (MI.modifiesRegister(Exec, TRI)) {  in runOnMachineFunction()
833     Changed |= optimizeVCMPSaveExecSequence(*SaveExecInstr, *VCmpInstr, Exec);  in runOnMachineFunction()