47   STORE = 1u << 1,  enumerator
48   LLVM_MARK_AS_BITMASK_ENUM(/* LargestFlag = */ STORE)
1058   assert(Op == SIMemOp::LOAD || Op == SIMemOp::STORE);  in enableVolatileAndOrNonTemporal()
1239   return insertWait(MI, Scope, AddrSpace, SIMemOp::LOAD | SIMemOp::STORE,  in insertRelease()
1411   assert(Op == SIMemOp::LOAD || Op == SIMemOp::STORE);  in enableVolatileAndOrNonTemporal()
1713   assert(Op == SIMemOp::LOAD || Op == SIMemOp::STORE);  in enableVolatileAndOrNonTemporal()
1884   Changed |= insertWait(MI, Scope, AddrSpace, SIMemOp::LOAD | SIMemOp::STORE,  in insertRelease()
1946   assert(Op == SIMemOp::LOAD || Op == SIMemOp::STORE);  in enableVolatileAndOrNonTemporal()
1974     if (Op == SIMemOp::STORE)  in enableVolatileAndOrNonTemporal()
2009       if ((Op & SIMemOp::STORE) != SIMemOp::NONE)  in insertWait()
2021         if ((Op & SIMemOp::STORE) != SIMemOp::NONE)  in insertWait()
2217   assert(Op == SIMemOp::LOAD || Op == SIMemOp::STORE);  in enableVolatileAndOrNonTemporal()
2246     if (Op == SIMemOp::STORE)  in enableVolatileAndOrNonTemporal()
2328       if ((Op & SIMemOp::STORE) != SIMemOp::NONE)  in insertWait()
2340         if ((Op & SIMemOp::STORE) != SIMemOp::NONE)  in insertWait()
2516   insertWait(MI, Scope, AddrSpace, SIMemOp::LOAD | SIMemOp::STORE,  in insertRelease()
2533   assert(Op == SIMemOp::LOAD || Op == SIMemOp::STORE);  in enableVolatileAndOrNonTemporal()
2548     if (Op == SIMemOp::STORE)  in enableVolatileAndOrNonTemporal()
2638                                 SIMemOp::LOAD | SIMemOp::STORE,  in expandLoad()
2695       MI, MOI.getInstrAddrSpace(), SIMemOp::STORE, MOI.isVolatile(),  in expandStore()
2720           MI, MOI.getScope(), OrderingAddrSpace, SIMemOp::LOAD | SIMemOp::STORE,  in expandAtomicFence()
2787                                                    SIMemOp::STORE,  in expandAtomicCmpxchgOrRmw()