140                     SISchedulerCandidate &TryCand,  in tryLess()  argument
144     TryCand.Reason = Reason;  in tryLess()
157                        SISchedulerCandidate &TryCand,  in tryGreater()  argument
161     TryCand.Reason = Reason;  in tryGreater()
190                                           SISchedCandidate &TryCand) {  in tryCandidateTopDown()  argument
193     TryCand.Reason = NodeOrder;  in tryCandidateTopDown()
198       SISched::tryLess(TryCand.SGPRUsage, Cand.SGPRUsage,  in tryCandidateTopDown()
199                        TryCand, Cand, RegUsage))  in tryCandidateTopDown()
217   if (SISched::tryLess(TryCand.HasLowLatencyNonWaitedParent,  in tryCandidateTopDown()
219                        TryCand, Cand, SIScheduleCandReason::Depth))  in tryCandidateTopDown()
222   if (SISched::tryGreater(TryCand.IsLowLatency, Cand.IsLowLatency,  in tryCandidateTopDown()
223                           TryCand, Cand, SIScheduleCandReason::Depth))  in tryCandidateTopDown()
226   if (TryCand.IsLowLatency &&  in tryCandidateTopDown()
227       SISched::tryLess(TryCand.LowLatencyOffset, Cand.LowLatencyOffset,  in tryCandidateTopDown()
228                        TryCand, Cand, SIScheduleCandReason::Depth))  in tryCandidateTopDown()
231   if (SISched::tryLess(TryCand.VGPRUsage, Cand.VGPRUsage,  in tryCandidateTopDown()
232                        TryCand, Cand, RegUsage))  in tryCandidateTopDown()
236   if (TryCand.SU->NodeNum < Cand.SU->NodeNum) {  in tryCandidateTopDown()
237     TryCand.Reason = NodeOrder;  in tryCandidateTopDown()
245     SISchedCandidate TryCand;  in pickNode()  local
249     TryCand.SU = SU;  in pickNode()
251     TryCand.SGPRUsage = pressure[AMDGPU::RegisterPressureSets::SReg_32];  in pickNode()
252     TryCand.VGPRUsage = pressure[AMDGPU::RegisterPressureSets::VGPR_32];  in pickNode()
253     TryCand.IsLowLatency = DAG->IsLowLatencySU[SU->NodeNum];  in pickNode()
254     TryCand.LowLatencyOffset = DAG->LowLatencyOffset[SU->NodeNum];  in pickNode()
255     TryCand.HasLowLatencyNonWaitedParent =  in pickNode()
257     tryCandidateTopDown(TopCand, TryCand);  in pickNode()
258     if (TryCand.Reason != NoCand)  in pickNode()
259       TopCand.setBest(TryCand);  in pickNode()
1519                                                    SIBlockSchedCandidate &TryCand) {  in tryCandidateLatency()  argument
1521     TryCand.Reason = NodeOrder;  in tryCandidateLatency()
1526   if (SISched::tryLess(TryCand.LastPosHighLatParentScheduled,  in tryCandidateLatency()
1527                  Cand.LastPosHighLatParentScheduled, TryCand, Cand, Latency))  in tryCandidateLatency()
1530   if (SISched::tryGreater(TryCand.IsHighLatency, Cand.IsHighLatency,  in tryCandidateLatency()
1531                           TryCand, Cand, Latency))  in tryCandidateLatency()
1533   if (TryCand.IsHighLatency && SISched::tryGreater(TryCand.Height, Cand.Height,  in tryCandidateLatency()
1534                                                    TryCand, Cand, Depth))  in tryCandidateLatency()
1536   if (SISched::tryGreater(TryCand.NumHighLatencySuccessors,  in tryCandidateLatency()
1538                           TryCand, Cand, Successor))  in tryCandidateLatency()
1544                                                     SIBlockSchedCandidate &TryCand) {  in tryCandidateRegUsage()  argument
1546     TryCand.Reason = NodeOrder;  in tryCandidateRegUsage()
1550   if (SISched::tryLess(TryCand.VGPRUsageDiff > 0, Cand.VGPRUsageDiff > 0,  in tryCandidateRegUsage()
1551                        TryCand, Cand, RegUsage))  in tryCandidateRegUsage()
1553   if (SISched::tryGreater(TryCand.NumSuccessors > 0,  in tryCandidateRegUsage()
1555                           TryCand, Cand, Successor))  in tryCandidateRegUsage()
1557   if (SISched::tryGreater(TryCand.Height, Cand.Height, TryCand, Cand, Depth))  in tryCandidateRegUsage()
1559   if (SISched::tryLess(TryCand.VGPRUsageDiff, Cand.VGPRUsageDiff,  in tryCandidateRegUsage()
1560                        TryCand, Cand, RegUsage))  in tryCandidateRegUsage()
1593     SIBlockSchedCandidate TryCand;  in pickBlock()  local
1594     TryCand.Block = *I;  in pickBlock()
1595     TryCand.IsHighLatency = TryCand.Block->isHighLatencyBlock();  in pickBlock()
1596     TryCand.VGPRUsageDiff =  in pickBlock()
1597       checkRegUsageImpact(TryCand.Block->getInRegs(),  in pickBlock()
1598           TryCand.Block->getOutRegs())[AMDGPU::RegisterPressureSets::VGPR_32];  in pickBlock()
1599     TryCand.NumSuccessors = TryCand.Block->getSuccs().size();  in pickBlock()
1600     TryCand.NumHighLatencySuccessors =  in pickBlock()
1601       TryCand.Block->getNumHighLatencySuccessors();  in pickBlock()
1602     TryCand.LastPosHighLatParentScheduled =  in pickBlock()
1604          LastPosHighLatencyParentScheduled[TryCand.Block->getID()] -  in pickBlock()
1606     TryCand.Height = TryCand.Block->Height;  in pickBlock()
1610       if (!tryCandidateRegUsage(Cand, TryCand) &&  in pickBlock()
1612         tryCandidateLatency(Cand, TryCand);  in pickBlock()
1614       if (!tryCandidateLatency(Cand, TryCand))  in pickBlock()
1615         tryCandidateRegUsage(Cand, TryCand);  in pickBlock()
1617     if (TryCand.Reason != NoCand) {  in pickBlock()
1618       Cand.setBest(TryCand);  in pickBlock()