Lines Matching refs:LaneMaskRegAttrs
36 MachineRegisterInfo::VRegAttrs LaneMaskRegAttrs);
308 MachineRegisterInfo::VRegAttrs LaneMaskRegAttrs, in addLoopEntries() argument
318 Dom, insertUndefLaneMask(Dom, &MRI, LaneMaskRegAttrs));
325 Pred, insertUndefLaneMask(Pred, &MRI, LaneMaskRegAttrs));
417 MachineRegisterInfo::VRegAttrs LaneMaskRegAttrs) { in createLaneMaskReg() argument
418 return MRI->createVirtualRegister(LaneMaskRegAttrs); in createLaneMaskReg()
423 MachineRegisterInfo::VRegAttrs LaneMaskRegAttrs) { in insertUndefLaneMask() argument
427 Register UndefReg = createLaneMaskReg(MRI, LaneMaskRegAttrs); in insertUndefLaneMask()
599 LF.addLoopEntries(FoundLoopLevel, SSAUpdater, *MRI, LaneMaskRegAttrs, in lowerPhis()
603 Incoming.UpdatedReg = createLaneMaskReg(MRI, LaneMaskRegAttrs); in lowerPhis()
620 MBB, insertUndefLaneMask(MBB, MRI, LaneMaskRegAttrs)); in lowerPhis()
628 Incoming.UpdatedReg = createLaneMaskReg(MRI, LaneMaskRegAttrs); in lowerPhis()
694 Register TmpReg = createLaneMaskReg(MRI, LaneMaskRegAttrs); in lowerCopiesToI1()
717 LF.addLoopEntries(FoundLoopLevel, SSAUpdater, *MRI, LaneMaskRegAttrs); in lowerCopiesToI1()
882 PrevMaskedReg = createLaneMaskReg(MRI, LaneMaskRegAttrs); in buildMergeLaneMasks()
893 CurMaskedReg = createLaneMaskReg(MRI, LaneMaskRegAttrs); in buildMergeLaneMasks()