Lines Matching refs:Incoming
74 SmallVectorImpl<Incoming> &Incomings) const override;
81 void constrainAsLaneMask(Incoming &In) override;
150 void analyze(MachineBasicBlock &DefBlock, ArrayRef<Incoming> Incomings) { in analyze()
161 for (auto Incoming : Incomings) { in analyze() local
162 MachineBasicBlock *MBB = Incoming.Block; in analyze()
309 ArrayRef<Incoming> Incomings = {}) { in addLoopEntries()
313 for (auto &Incoming : Incomings) local
314 Dom = DT.findNearestCommonDominator(Dom, Incoming.Block);
332 ArrayRef<Incoming> Incomings) const { in inLoopLevel()
337 for (auto &Incoming : Incomings) in inLoopLevel() local
338 if (Incoming.Block == &MBB) in inLoopLevel()
545 SmallVector<Incoming, 4> Incomings; in lowerPhis()
572 llvm::sort(Incomings, [this](Incoming LHS, Incoming RHS) { in lowerPhis()
602 for (auto &Incoming : Incomings) { in lowerPhis() local
603 Incoming.UpdatedReg = createLaneMaskReg(MRI, LaneMaskRegAttrs); in lowerPhis()
604 SSAUpdater.AddAvailableValue(Incoming.Block, Incoming.UpdatedReg); in lowerPhis()
607 for (auto &Incoming : Incomings) { in lowerPhis() local
608 MachineBasicBlock &IMBB = *Incoming.Block; in lowerPhis()
610 IMBB, getSaluInsertionAtEnd(IMBB), {}, Incoming.UpdatedReg, in lowerPhis()
611 SSAUpdater.GetValueInMiddleOfBlock(&IMBB), Incoming.Reg); in lowerPhis()
622 for (auto &Incoming : Incomings) { in lowerPhis() local
623 MachineBasicBlock &IMBB = *Incoming.Block; in lowerPhis()
625 constrainAsLaneMask(Incoming); in lowerPhis()
626 SSAUpdater.AddAvailableValue(&IMBB, Incoming.Reg); in lowerPhis()
628 Incoming.UpdatedReg = createLaneMaskReg(MRI, LaneMaskRegAttrs); in lowerPhis()
629 SSAUpdater.AddAvailableValue(&IMBB, Incoming.UpdatedReg); in lowerPhis()
633 for (auto &Incoming : Incomings) { in lowerPhis() local
634 if (!Incoming.UpdatedReg.isValid()) in lowerPhis()
637 MachineBasicBlock &IMBB = *Incoming.Block; in lowerPhis()
639 IMBB, getSaluInsertionAtEnd(IMBB), {}, Incoming.UpdatedReg, in lowerPhis()
640 SSAUpdater.GetValueInMiddleOfBlock(&IMBB), Incoming.Reg); in lowerPhis()
827 const MachineInstr *MI, SmallVectorImpl<Incoming> &Incomings) const { in collectIncomingValuesFromPhi()
917 void Vreg1LoweringHelper::constrainAsLaneMask(Incoming &In) {} in constrainAsLaneMask()