SIInstrInfo.cpp - OpenGrok cross reference for /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

Lines Matching refs:createVirtualRegister
1239     Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1252       Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1266       Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1282       Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1296       Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1308       Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1309       Register SReg2 = MRI.createVirtualRegister(RI.getBoolRC());  in insertVectorSelect()
1326       Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1327       Register SReg2 = MRI.createVirtualRegister(RI.getBoolRC());  in insertVectorSelect()
1357   Register Reg = MRI.createVirtualRegister(RI.getBoolRC());  in insertEQ()
1370   Register Reg = MRI.createVirtualRegister(RI.getBoolRC());  in insertNE()
2052   Register DoorbellReg = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);  in insertSimulatedTrap()
2059       MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);  in insertSimulatedTrap()
2064       MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);  in insertSimulatedTrap()
2671       auto Tmp = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in expandMovDPP64()
2896   Register PCReg = MRI.createVirtualRegister(&AMDGPU::SReg_64RegClass);  in insertIndirectBranch()
3344     Register DstElt = MRI.createVirtualRegister(EltRC);  in insertSelect()
5645   Register Reg = MRI.createVirtualRegister(VRC);  in legalizeOpWithMove()
5657   Register SubReg = MRI.createVirtualRegister(SubRC);  in buildExtractSubReg()
5872       Register Reg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in legalizeOperandsVOP2()
5878       Register Reg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in legalizeOperandsVOP2()
5911     Register Reg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in legalizeOperandsVOP2()
5983       Register Reg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in legalizeOperandsVOP3()
5989       Register Reg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in legalizeOperandsVOP3()
6061   Register DstReg = MRI.createVirtualRegister(SRC);  in readlaneVGPRToSGPR()
6066     Register NewSrcReg = MRI.createVirtualRegister(VRC);  in readlaneVGPRToSGPR()
6082     Register SGPR = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);  in readlaneVGPRToSGPR()
6233   Register DstReg = MRI.createVirtualRegister(DstRC);  in legalizeGenericOperand()
6289       Register CurReg = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);  in emitLoadScalarOpsFromVGPRLoop()
6294       Register NewCondReg = MRI.createVirtualRegister(BoolXExecRC);  in emitLoadScalarOpsFromVGPRLoop()
6304         Register AndReg = MRI.createVirtualRegister(BoolXExecRC);  in emitLoadScalarOpsFromVGPRLoop()
6320         Register CurRegLo = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);  in emitLoadScalarOpsFromVGPRLoop()
6321         Register CurRegHi = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);  in emitLoadScalarOpsFromVGPRLoop()
6336         Register CurReg = MRI.createVirtualRegister(&AMDGPU::SGPR_64RegClass);  in emitLoadScalarOpsFromVGPRLoop()
6343         Register NewCondReg = MRI.createVirtualRegister(BoolXExecRC);  in emitLoadScalarOpsFromVGPRLoop()
6357           Register AndReg = MRI.createVirtualRegister(BoolXExecRC);  in emitLoadScalarOpsFromVGPRLoop()
6367       Register SScalarOp = MRI.createVirtualRegister(SScalarOpRC);  in emitLoadScalarOpsFromVGPRLoop()
6383   Register SaveExec = MRI.createVirtualRegister(BoolXExecRC);  in emitLoadScalarOpsFromVGPRLoop()
6436     SaveSCCReg = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);  in loadMBUFScalarOperandsFromVGPR()
6442   Register SaveExec = MRI.createVirtualRegister(BoolXExecRC);  in loadMBUFScalarOperandsFromVGPR()
6523   Register Zero64 = MRI.createVirtualRegister(&AMDGPU::SReg_64RegClass);  in extractRsrcPtr()
6524   Register SRsrcFormatLo = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);  in extractRsrcPtr()
6525   Register SRsrcFormatHi = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);  in extractRsrcPtr()
6526   Register NewSRsrc = MRI.createVirtualRegister(&AMDGPU::SGPR_128RegClass);  in extractRsrcPtr()
6756     Register Reg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in legalizeOperands()
6813       Register NewVAddrLo = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in legalizeOperands()
6814       Register NewVAddrHi = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in legalizeOperands()
6815       Register NewVAddr = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in legalizeOperands()
6818       Register CondReg0 = MRI.createVirtualRegister(BoolXExecRC);  in legalizeOperands()
6819       Register CondReg1 = MRI.createVirtualRegister(BoolXExecRC);  in legalizeOperands()
6858       Register NewVAddr = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in legalizeOperands()
7199       Register NewCarryReg = MRI.createVirtualRegister(CarryRC);  in moveToVALUImpl()
7206     Register DestReg = MRI.createVirtualRegister(RI.getEquivalentVGPRClass(  in moveToVALUImpl()
7234     Register DestReg = MRI.createVirtualRegister(NewRC);  in moveToVALUImpl()
7296     Register CondReg = MRI.createVirtualRegister(RI.getWaveMaskRegClass());  in moveToVALUImpl()
7322     Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in moveToVALUImpl()
7323     Register NewDst = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in moveToVALUImpl()
7343     Register NewDst = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in moveToVALUImpl()
7404     Register NewDstReg = MRI.createVirtualRegister(NewDstRC);  in moveToVALUImpl()
7495     NewDstReg = MRI.createVirtualRegister(NewDstRC);  in moveToVALUImpl()
7518     Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in moveScalarAddSub()
7572     NewCondReg = MRI.createVirtualRegister(TC);  in lowerSelect()
7603   Register NewDestReg = MRI.createVirtualRegister(  in lowerSelect()
7634   Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in lowerScalarAbs()
7635   Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in lowerScalarAbs()
7664     Register NewDest = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in lowerScalarXnor()
7684     Register Temp = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);  in lowerScalarXnor()
7685     Register NewDest = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);  in lowerScalarXnor()
7729   Register NewDest = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);  in splitScalarNotBinop()
7730   Register Interm = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);  in splitScalarNotBinop()
7758   Register NewDest = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in splitScalarBinOpN2()
7759   Register Interm = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in splitScalarBinOpN2()
7803   Register DestSub0 = MRI.createVirtualRegister(NewDestSubRC);  in splitScalar64BitUnaryOp()
7809   Register DestSub1 = MRI.createVirtualRegister(NewDestSubRC);  in splitScalar64BitUnaryOp()
7815   Register FullDestReg = MRI.createVirtualRegister(NewDestRC);  in splitScalar64BitUnaryOp()
7842   Register FullDestReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in splitScalarSMulU64()
7843   Register DestSub0 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalarSMulU64()
7844   Register DestSub1 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalarSMulU64()
7889   Register Op1L_Op0H_Reg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalarSMulU64()
7895   Register Op1H_Op0L_Reg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalarSMulU64()
7901   Register CarryReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalarSMulU64()
7912   Register AddReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalarSMulU64()
7951   Register FullDestReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in splitScalarSMulPseudo()
7952   Register DestSub0 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalarSMulPseudo()
7953   Register DestSub1 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalarSMulPseudo()
8049   Register DestSub0 = MRI.createVirtualRegister(NewDestSubRC);  in splitScalar64BitBinaryOp()
8054   Register DestSub1 = MRI.createVirtualRegister(NewDestSubRC);  in splitScalar64BitBinaryOp()
8059   Register FullDestReg = MRI.createVirtualRegister(NewDestRC);  in splitScalar64BitBinaryOp()
8090   Register Interm = MRI.createVirtualRegister(&AMDGPU::SReg_64RegClass);  in splitScalar64BitXnor()
8106   Register NewDest = MRI.createVirtualRegister(DestRC);  in splitScalar64BitXnor()
8133   Register MidReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitBCNT()
8134   Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitBCNT()
8174     Register MidRegLo = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitBFE()
8175     Register MidRegHi = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitBFE()
8176     Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in splitScalar64BitBFE()
8199   Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitBFE()
8200   Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in splitScalar64BitBFE()
8248   Register MidReg1 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitCountOp()
8249   Register MidReg2 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitCountOp()
8250   Register MidReg3 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitCountOp()
8251   Register MidReg4 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitCountOp()
8310   Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
8318     Register ImmReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
8319     Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
8337     Register ImmReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
8347     Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
8358     Register ImmReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
8359     Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
8781     Register DstReg = MRI.createVirtualRegister(RI.getBoolRC());  in convertNonUniformIfRegion()
8808     Register DstReg = MRI.createVirtualRegister(RI.getBoolRC());  in convertNonUniformLoopRegion()
8809     Register BackEdgeReg = MRI.createVirtualRegister(RI.getBoolRC());  in convertNonUniformLoopRegion()
8816         Register ZeroReg = MRI.createVirtualRegister(RI.getBoolRC());  in convertNonUniformLoopRegion()
8952   Register UnusedCarry = MRI.createVirtualRegister(RI.getBoolRC());  in getAddNoCarry()
9932   Register Undef = MRI.createVirtualRegister(  in enforceOperandRCAlignment()
9936       MRI.createVirtualRegister(IsAGPR ? &AMDGPU::AReg_64_Align2RegClass  in enforceOperandRCAlignment()