Lines Matching refs:instruction

20   // SALU instruction formats.
27   // VALU instruction formats.
38   // Memory instruction formats.
52   // LDSDIR instruction format.
55   // VINTERP instruction format.
63   // Whether WQM _must_ be enabled for this instruction.
66   // Whether WQM _must_ be disabled for this instruction.
71   // This is an s_store_dword* instruction that requires a cache flush
77   // instruction size.
84   // Is it possible for this instruction to be atomic?
87   // This bit indicates that this is a VI instruction which is renamed
95   // This bit indicates that instruction may support integer clamping
107   // This bit indicates that this is a packed VOP3P instruction
110   // This bit indicates that this is a D16 buffer instruction.
113   // This field indicates that FLAT instruction accesses FLAT_GLBL segment.
133   // This field indicates that FLAT instruction accesses FLAT_SCRATCH segment.
149   // This bit indicates that the instruction is never-uniform/divergent