Lines Matching refs:lowerRawBufferAtomicIntrin

8782 SDValue SITargetLowering::lowerRawBufferAtomicIntrin(SDValue Op,  in lowerRawBufferAtomicIntrin()  function in SITargetLowering
9005 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_FADD); in LowerINTRINSIC_W_CHAIN()
9011 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_FMIN); in LowerINTRINSIC_W_CHAIN()
9017 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_FMAX); in LowerINTRINSIC_W_CHAIN()
9023 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_SWAP); in LowerINTRINSIC_W_CHAIN()
9026 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_ADD); in LowerINTRINSIC_W_CHAIN()
9029 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_SUB); in LowerINTRINSIC_W_CHAIN()
9032 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_SMIN); in LowerINTRINSIC_W_CHAIN()
9035 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_UMIN); in LowerINTRINSIC_W_CHAIN()
9038 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_SMAX); in LowerINTRINSIC_W_CHAIN()
9041 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_UMAX); in LowerINTRINSIC_W_CHAIN()
9044 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_AND); in LowerINTRINSIC_W_CHAIN()
9047 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_OR); in LowerINTRINSIC_W_CHAIN()
9050 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_XOR); in LowerINTRINSIC_W_CHAIN()
9053 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_INC); in LowerINTRINSIC_W_CHAIN()
9056 return lowerRawBufferAtomicIntrin(Op, DAG, AMDGPUISD::BUFFER_ATOMIC_DEC); in LowerINTRINSIC_W_CHAIN()
9058 return lowerRawBufferAtomicIntrin(Op, DAG, in LowerINTRINSIC_W_CHAIN()