4364   MachineBasicBlock *LoopBB = MF->CreateMachineBasicBlock();  in splitBlockForLoop()  local
4369   MF->insert(MBBI, LoopBB);  in splitBlockForLoop()
4372   LoopBB->addSuccessor(LoopBB);  in splitBlockForLoop()
4373   LoopBB->addSuccessor(RemainderBB);  in splitBlockForLoop()
4382     LoopBB->splice(LoopBB->begin(), &MBB, I, Next);  in splitBlockForLoop()
4390   MBB.addSuccessor(LoopBB);  in splitBlockForLoop()
4392   return std::pair(LoopBB, RemainderBB);  in splitBlockForLoop()
4416   MachineBasicBlock *LoopBB;  in emitGWSMemViolTestLoop()  local
4424   std::tie(LoopBB, RemainderBB) = splitBlockForLoop(MI, *BB, true);  in emitGWSMemViolTestLoop()
4426   MachineBasicBlock::iterator I = LoopBB->end();  in emitGWSMemViolTestLoop()
4432   BuildMI(*LoopBB, LoopBB->begin(), DL, TII->get(AMDGPU::S_SETREG_IMM32_B32))  in emitGWSMemViolTestLoop()
4441   BuildMI(*LoopBB, I, DL, TII->get(AMDGPU::S_GETREG_B32), Reg)  in emitGWSMemViolTestLoop()
4445   BuildMI(*LoopBB, I, DL, TII->get(AMDGPU::S_CMP_LG_U32))  in emitGWSMemViolTestLoop()
4448   BuildMI(*LoopBB, I, DL, TII->get(AMDGPU::S_CBRANCH_SCC1))  in emitGWSMemViolTestLoop()
4449     .addMBB(LoopBB);  in emitGWSMemViolTestLoop()
4461                        MachineBasicBlock &OrigBB, MachineBasicBlock &LoopBB,  in emitLoadM0FromVGPRLoop()  argument
4470   MachineBasicBlock::iterator I = LoopBB.begin();  in emitLoadM0FromVGPRLoop()
4478   BuildMI(LoopBB, I, DL, TII->get(TargetOpcode::PHI), PhiReg)  in emitLoadM0FromVGPRLoop()
4482     .addMBB(&LoopBB);  in emitLoadM0FromVGPRLoop()
4484   BuildMI(LoopBB, I, DL, TII->get(TargetOpcode::PHI), PhiExec)  in emitLoadM0FromVGPRLoop()
4488     .addMBB(&LoopBB);  in emitLoadM0FromVGPRLoop()
4491   BuildMI(LoopBB, I, DL, TII->get(AMDGPU::V_READFIRSTLANE_B32), CurrentIdxReg)  in emitLoadM0FromVGPRLoop()
4495   BuildMI(LoopBB, I, DL, TII->get(AMDGPU::V_CMP_EQ_U32_e64), CondReg)  in emitLoadM0FromVGPRLoop()
4500   BuildMI(LoopBB, I, DL, TII->get(ST.isWave32() ? AMDGPU::S_AND_SAVEEXEC_B32  in emitLoadM0FromVGPRLoop()
4512       BuildMI(LoopBB, I, DL, TII->get(AMDGPU::S_ADD_I32), SGPRIdxReg)  in emitLoadM0FromVGPRLoop()
4519       BuildMI(LoopBB, I, DL, TII->get(AMDGPU::S_MOV_B32), AMDGPU::M0)  in emitLoadM0FromVGPRLoop()
4522       BuildMI(LoopBB, I, DL, TII->get(AMDGPU::S_ADD_I32), AMDGPU::M0)  in emitLoadM0FromVGPRLoop()
4531     BuildMI(LoopBB, I, DL, TII->get(ST.isWave32() ? AMDGPU::S_XOR_B32_term  in emitLoadM0FromVGPRLoop()
4540   BuildMI(LoopBB, I, DL, TII->get(AMDGPU::S_CBRANCH_EXECNZ))  in emitLoadM0FromVGPRLoop()
4541     .addMBB(&LoopBB);  in emitLoadM0FromVGPRLoop()
4575   MachineBasicBlock *LoopBB;  in loadM0FromVGPR()  local
4577   std::tie(LoopBB, RemainderBB) = splitBlockForLoop(MI, MBB, false);  in loadM0FromVGPR()
4581   auto InsPt = emitLoadM0FromVGPRLoop(TII, MRI, MBB, *LoopBB, DL, *Idx,  in loadM0FromVGPR()
4586   MachineFunction::iterator MBBI(LoopBB);  in loadM0FromVGPR()
4589   LoopBB->removeSuccessor(RemainderBB);  in loadM0FromVGPR()
4591   LoopBB->addSuccessor(LandingPad);  in loadM0FromVGPR()
4719   MachineBasicBlock *LoopBB = InsPt->getParent();  in emitIndirectSrc()  local
4725     BuildMI(*LoopBB, InsPt, DL, GPRIDXDesc, Dst)  in emitIndirectSrc()
4730     BuildMI(*LoopBB, InsPt, DL, TII->get(AMDGPU::V_MOVRELS_B32_e32), Dst)  in emitIndirectSrc()
4737   return LoopBB;  in emitIndirectSrc()
4820   MachineBasicBlock *LoopBB = InsPt->getParent();  in emitIndirectDst()  local
4826     BuildMI(*LoopBB, InsPt, DL, GPRIDXDesc, Dst)  in emitIndirectDst()
4834     BuildMI(*LoopBB, InsPt, DL, MovRelDesc, Dst)  in emitIndirectDst()
4841   return LoopBB;  in emitIndirectDst()