209          {ISD::FADD,     ISD::FSUB,       ISD::FMUL,    ISD::FDIV,  in SITargetLowering()
779     setOperationAction({ISD::FADD, ISD::FMUL, ISD::FMA, ISD::FMINNUM_IEEE,  in SITargetLowering()
801       setOperationAction({ISD::FADD, ISD::FMUL, ISD::FMA, ISD::FCANONICALIZE},  in SITargetLowering()
812       setOperationAction({ISD::FADD, ISD::FMUL, ISD::FMA, ISD::FNEG},  in SITargetLowering()
814       setOperationAction({ISD::FADD, ISD::FMUL, ISD::FMA},  in SITargetLowering()
5853   case ISD::FMUL:  in LowerOperation()
10494   return DAG.getNode(ISD::FMUL, SL, VT, LHS, Recip, Flags);  in lowerFastUnsafeFDIV()
10519   SDValue Ret = DAG.getNode(ISD::FMUL, SL, VT, X, R);  in lowerFastUnsafeFDIV64()
10536   case ISD::FMUL:  in getFPBinOp()
10580   SDValue Quot = DAG.getNode(ISD::FMUL, SL, MVT::f32, CvtSrc0, RcpSrc1);  in LowerFDIV16()
10612   r1 = DAG.getNode(ISD::FMUL, SL, MVT::f32, RHS, r3, Flags);  in lowerFDIV_FAST()
10617   SDValue Mul = DAG.getNode(ISD::FMUL, SL, MVT::f32, LHS, r0, Flags);  in lowerFDIV_FAST()
10619   return DAG.getNode(ISD::FMUL, SL, MVT::f32, r3, Mul, Flags);  in lowerFDIV_FAST()
10726   SDValue Mul = getFPBinOp(DAG, ISD::FMUL, SL, MVT::f32, NumeratorScaled,  in LowerFDIV32()
10798   SDValue Mul = DAG.getNode(ISD::FMUL, SL, MVT::f64, DivScale1, Fma3);  in LowerFDIV64()
10996   SDValue ScaledX = DAG.getNode(ISD::FMUL, DL, VT, X, ScaleUpFactor, Flags);  in lowerFSQRTF32()
11038     SqrtS = DAG.getNode(ISD::FMUL, DL, VT, SqrtX, SqrtR, Flags);  in lowerFSQRTF32()
11041     SDValue SqrtH = DAG.getNode(ISD::FMUL, DL, VT, SqrtR, Half, Flags);  in lowerFSQRTF32()
11057       DAG.getNode(ISD::FMUL, DL, VT, SqrtS, ScaleDownFactor, Flags);  in lowerFSQRTF32()
11107   SDValue SqrtS0 = DAG.getNode(ISD::FMUL, DL, MVT::f64, SqrtX, SqrtY);  in lowerFSQRTF64()
11110   SDValue SqrtH0 = DAG.getNode(ISD::FMUL, DL, MVT::f64, SqrtY, Half);  in lowerFSQRTF64()
11161     SDValue MulVal = DAG.getNode(ISD::FMUL, DL, VT, Arg, OneOver2Pi, Flags);  in LowerTrig()
11164     TrigVal = DAG.getNode(ISD::FMUL, DL, VT, Arg, OneOver2Pi, Flags);  in LowerTrig()
12624   case ISD::FMUL:  in isCanonicalized()
13409     case ISD::FMUL:  in performExtractVectorEltCombine()