184   Register TargetLo = TRI->getSubReg(TargetReg, AMDGPU::sub0);  in buildGitPtr()
185   Register TargetHi = TRI->getSubReg(TargetReg, AMDGPU::sub1);  in buildGitPtr()
256                             : Register(TRI.getSubReg(SuperReg, SplitParts[I]));  in saveToMemory()
277                             : Register(TRI.getSubReg(SuperReg, SplitParts[I]));  in saveToVGPRLane()
304                             : Register(TRI.getSubReg(SuperReg, SplitParts[I]));  in restoreFromMemory()
323                             : Register(TRI.getSubReg(SuperReg, SplitParts[I]));  in restoreFromVGPRLane()
426     FlatScrInitLo = TRI->getSubReg(FlatScrInit, AMDGPU::sub0);  in emitEntryFunctionFlatScratchInit()
427     FlatScrInitHi = TRI->getSubReg(FlatScrInit, AMDGPU::sub1);  in emitEntryFunctionFlatScratchInit()
465     FlatScrInitLo = TRI->getSubReg(FlatScratchInitReg, AMDGPU::sub0);  in emitEntryFunctionFlatScratchInit()
466     FlatScrInitHi = TRI->getSubReg(FlatScratchInitReg, AMDGPU::sub1);  in emitEntryFunctionFlatScratchInit()
743     Register Rsrc01 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub0_sub1);  in emitEntryFunctionScratchRsrcRegSetup()
744     Register Rsrc03 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub3);  in emitEntryFunctionScratchRsrcRegSetup()
784     Register Rsrc2 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub2);  in emitEntryFunctionScratchRsrcRegSetup()
785     Register Rsrc3 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub3);  in emitEntryFunctionScratchRsrcRegSetup()
791       Register Rsrc01 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub0_sub1);  in emitEntryFunctionScratchRsrcRegSetup()
819       Register Rsrc0 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub0);  in emitEntryFunctionScratchRsrcRegSetup()
820       Register Rsrc1 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub1);  in emitEntryFunctionScratchRsrcRegSetup()
856   Register ScratchRsrcSub0 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub0);  in emitEntryFunctionScratchRsrcRegSetup()
857   Register ScratchRsrcSub1 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub1);  in emitEntryFunctionScratchRsrcRegSetup()
1692     SavedRegs.set(TRI->getSubReg(RetAddrReg, AMDGPU::sub0));  in determineCalleeSavesSGPR()
1693     SavedRegs.set(TRI->getSubReg(RetAddrReg, AMDGPU::sub1));  in determineCalleeSavesSGPR()