233   Register SuperReg;  member in llvm::PrologEpilogSGPRSpillBuilder
255                             ? SuperReg  in saveToMemory()
256                             : Register(TRI.getSubReg(SuperReg, SplitParts[I]));  in saveToMemory()
276                             ? SuperReg  in saveToVGPRLane()
277                             : Register(TRI.getSubReg(SuperReg, SplitParts[I]));  in saveToVGPRLane()
288         .addReg(SuperReg)  in copyToScratchSGPR()
303                             ? SuperReg  in restoreFromMemory()
304                             : Register(TRI.getSubReg(SuperReg, SplitParts[I]));  in restoreFromMemory()
322                             ? SuperReg  in restoreFromVGPRLane()
323                             : Register(TRI.getSubReg(SuperReg, SplitParts[I]));  in restoreFromVGPRLane()
331     BuildMI(MBB, MI, DL, TII->get(AMDGPU::COPY), SuperReg)  in copyFromScratchSGPR()
347         SuperReg(Reg), SI(SI), LiveUnits(LiveUnits), DL(DL),  in PrologEpilogSGPRSpillBuilder()
349     const TargetRegisterClass *RC = TRI.getPhysRegBaseClass(SuperReg);  in PrologEpilogSGPRSpillBuilder()
353     assert(SuperReg != AMDGPU::M0 && "m0 should never spill");  in PrologEpilogSGPRSpillBuilder()