Lines Matching refs:Src1
1231 MachineOperand *Src1 = getImmOrMaterializedImm(MI->getOperand(Src1Idx)); in tryConstantFoldOp() local
1233 if (!Src0->isImm() && !Src1->isImm()) in tryConstantFoldOp()
1239 if (Src0->isImm() && Src1->isImm()) { in tryConstantFoldOp()
1241 if (!evalBinaryInstruction(Opc, NewImm, Src0->getImm(), Src1->getImm())) in tryConstantFoldOp()
1257 if (Src0->isImm() && !Src1->isImm()) { in tryConstantFoldOp()
1258 std::swap(Src0, Src1); in tryConstantFoldOp()
1262 int32_t Src1Val = static_cast<int32_t>(Src1->getImm()); in tryConstantFoldOp()
1317 MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in tryFoldCndMask() local
1318 if (!Src1->isIdenticalTo(*Src0)) { in tryFoldCndMask()
1320 auto *Src1Imm = getImmOrMaterializedImm(*Src1); in tryFoldCndMask()
1358 Register Src1 = MI.getOperand(2).getReg(); in tryFoldZeroHighBits() local
1359 MachineInstr *SrcDef = MRI->getVRegDef(Src1); in tryFoldZeroHighBits()
1364 MRI->replaceRegWith(Dst, Src1); in tryFoldZeroHighBits()
1366 MRI->clearKillFlags(Src1); in tryFoldZeroHighBits()
1532 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in isClamp() local
1533 if (!Src0->isReg() || !Src1->isReg() || in isClamp()
1534 Src0->getReg() != Src1->getReg() || in isClamp()
1535 Src0->getSubReg() != Src1->getSubReg() || in isClamp()
1680 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in isOMod() local
1683 RegOp = Src1; in isOMod()
1684 } else if (Src1->isImm()) { in isOMod()
1685 ImmOp = Src1; in isOMod()
1717 const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1); in isOMod() local
1719 if (Src0->isReg() && Src1->isReg() && Src0->getReg() == Src1->getReg() && in isOMod()
1720 Src0->getSubReg() == Src1->getSubReg() && in isOMod()