52   const R600InstrInfo *TII;  member in __anon0b5b71cd0111::R600PacketizerList
67     if (!TII->isALUInstr(I->getOpcode()) && !I->isBundle())  in getPreviousVector()
79       if (TII->isPredicated(*BI))  in getPreviousVector()
81       int OperandIdx = TII->getOperandIdx(BI->getOpcode(), R600::OpName::write);  in getPreviousVector()
84       int DstIdx = TII->getOperandIdx(BI->getOpcode(), R600::OpName::dst);  in getPreviousVector()
89       if (isTrans || TII->isTransOnly(*BI)) {  in getPreviousVector()
131       int OperandIdx = TII->getOperandIdx(MI.getOpcode(), Op);  in substitutePV()
145         TII(ST.getInstrInfo()),  in R600PacketizerList()
146         TRI(TII->getRegisterInfo()) {  in R600PacketizerList()
164     if (TII->isVector(MI))  in isSoloInstruction()
166     if (!TII->isALUInstr(MI.getOpcode()))  in isSoloInstruction()
172     return TII->isLDSInstr(MI.getOpcode());  in isSoloInstruction()
182     int OpI = TII->getOperandIdx(MII->getOpcode(), R600::OpName::pred_sel),  in isLegalToPacketizeTogether()
183         OpJ = TII->getOperandIdx(MIJ->getOpcode(), R600::OpName::pred_sel);  in isLegalToPacketizeTogether()
202         TII->definesAddressRegister(*MII) || TII->definesAddressRegister(*MIJ);  in isLegalToPacketizeTogether()
204         TII->usesAddressRegister(*MII) || TII->usesAddressRegister(*MIJ);  in isLegalToPacketizeTogether()
216     unsigned LastOp = TII->getOperandIdx(MI->getOpcode(), R600::OpName::last);  in setIsLastBit()
224     isTransSlot = TII->isTransOnly(MI);  in isBundlableWithCurrentPMI()
231             !TII->isVectorOnly(MI) && VLIW5) {  in isBundlableWithCurrentPMI()
245     if (!TII->fitsConstReadLimitations(CurrentPacketMIs)) {  in isBundlableWithCurrentPMI()
261     if (!TII->fitsReadPortLimitations(CurrentPacketMIs,  in isBundlableWithCurrentPMI()
278     if (isTransSlot && TII->readsLDSSrcReg(MI))  in isBundlableWithCurrentPMI()
296         unsigned Op = TII->getOperandIdx(MI->getOpcode(),  in addToPacket()
301           TII->getOperandIdx(MI.getOpcode(), R600::OpName::bank_swizzle);  in addToPacket()
313     if (TII->isTransOnly(MI))  in addToPacket()
321   const R600InstrInfo *TII = ST.getInstrInfo();  in runOnMachineFunction()  local
364         if (TII->isSchedulingBoundary(*std::prev(I), &*MBB, Fn))  in runOnMachineFunction()