Lines Matching +full:- +full:pvs
1 //===----- R600Packetizer.cpp - VLIW packetizer ---------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
66 I--; in getPreviousVector()
67 if (!TII->isALUInstr(I->getOpcode()) && !I->isBundle()) in getPreviousVector()
70 if (I->isBundle()) in getPreviousVector()
72 int LastDstChan = -1; in getPreviousVector()
79 if (TII->isPredicated(*BI)) in getPreviousVector()
81 int OperandIdx = TII->getOperandIdx(BI->getOpcode(), R600::OpName::write); in getPreviousVector()
82 if (OperandIdx > -1 && BI->getOperand(OperandIdx).getImm() == 0) in getPreviousVector()
84 int DstIdx = TII->getOperandIdx(BI->getOpcode(), R600::OpName::dst); in getPreviousVector()
85 if (DstIdx == -1) { in getPreviousVector()
88 Register Dst = BI->getOperand(DstIdx).getReg(); in getPreviousVector()
89 if (isTrans || TII->isTransOnly(*BI)) { in getPreviousVector()
93 if (BI->getOpcode() == R600::DOT4_r600 || in getPreviousVector()
94 BI->getOpcode() == R600::DOT4_eg) { in getPreviousVector()
119 } while ((++BI)->isBundledWithPred()); in getPreviousVector()
123 void substitutePV(MachineInstr &MI, const DenseMap<unsigned, unsigned> &PVs) in substitutePV()
131 int OperandIdx = TII->getOperandIdx(MI.getOpcode(), Op); in substitutePV()
135 const DenseMap<unsigned, unsigned>::const_iterator It = PVs.find(Src); in substitutePV()
136 if (It != PVs.end()) in substitutePV()
137 MI.getOperand(OperandIdx).setReg(It->second); in substitutePV()
146 TRI(TII->getRegisterInfo()) { in R600PacketizerList()
150 // initPacketizerState - initialize some internal flags.
155 // ignorePseudoInstruction - Ignore bundling of pseudo instructions.
161 // isSoloInstruction - return true if instruction MI can not be packetized
164 if (TII->isVector(MI)) in isSoloInstruction()
166 if (!TII->isALUInstr(MI.getOpcode())) in isSoloInstruction()
172 return TII->isLDSInstr(MI.getOpcode()); in isSoloInstruction()
175 // isLegalToPacketizeTogether - Is it legal to packetize SUI and SUJ
178 MachineInstr *MII = SUI->getInstr(), *MIJ = SUJ->getInstr(); in isLegalToPacketizeTogether()
182 int OpI = TII->getOperandIdx(MII->getOpcode(), R600::OpName::pred_sel), in isLegalToPacketizeTogether()
183 OpJ = TII->getOperandIdx(MIJ->getOpcode(), R600::OpName::pred_sel); in isLegalToPacketizeTogether()
184 Register PredI = (OpI > -1)?MII->getOperand(OpI).getReg() : Register(), in isLegalToPacketizeTogether()
185 PredJ = (OpJ > -1)?MIJ->getOperand(OpJ).getReg() : Register(); in isLegalToPacketizeTogether()
188 if (SUJ->isSucc(SUI)) { in isLegalToPacketizeTogether()
189 for (const SDep &Dep : SUJ->Succs) { in isLegalToPacketizeTogether()
195 if (MII->getOperand(0).getReg() != MIJ->getOperand(0).getReg()) in isLegalToPacketizeTogether()
202 TII->definesAddressRegister(*MII) || TII->definesAddressRegister(*MIJ); in isLegalToPacketizeTogether()
204 TII->usesAddressRegister(*MII) || TII->usesAddressRegister(*MIJ); in isLegalToPacketizeTogether()
209 // isLegalToPruneDependencies - Is it legal to prune dependency between SUI
216 unsigned LastOp = TII->getOperandIdx(MI->getOpcode(), R600::OpName::last); in setIsLastBit()
217 MI->getOperand(LastOp).setImm(Bit); in setIsLastBit()
224 isTransSlot = TII->isTransOnly(MI); in isBundlableWithCurrentPMI()
231 !TII->isVectorOnly(MI) && VLIW5) { in isBundlableWithCurrentPMI()
245 if (!TII->fitsConstReadLimitations(CurrentPacketMIs)) { in isBundlableWithCurrentPMI()
250 for (unsigned i = 0, e = CurrentPacketMIs.size() - 1; i < e; i++) { in isBundlableWithCurrentPMI()
251 CurrentPacketMIs[i]->dump(); in isBundlableWithCurrentPMI()
261 if (!TII->fitsReadPortLimitations(CurrentPacketMIs, in isBundlableWithCurrentPMI()
267 for (unsigned i = 0, e = CurrentPacketMIs.size() - 1; i < e; i++) { in isBundlableWithCurrentPMI()
268 CurrentPacketMIs[i]->dump(); in isBundlableWithCurrentPMI()
278 if (isTransSlot && TII->readsLDSSrcReg(MI)) in isBundlableWithCurrentPMI()
296 unsigned Op = TII->getOperandIdx(MI->getOpcode(), in addToPacket()
298 MI->getOperand(Op).setImm(BS[i]); in addToPacket()
301 TII->getOperandIdx(MI.getOpcode(), R600::OpName::bank_swizzle); in addToPacket()
308 endPacket(std::next(It)->getParent(), std::next(It)); in addToPacket()
313 if (TII->isTransOnly(MI)) in addToPacket()
330 assert(Packetizer.getResourceTracker()->getInstrItins()); in runOnMachineFunction()
332 if (Packetizer.getResourceTracker()->getInstrItins()->isEmpty()) in runOnMachineFunction()
336 // Loop over all basic blocks and remove KILL pseudo-instructions in runOnMachineFunction()
357 unsigned RemainingCount = MBB->size(); in runOnMachineFunction()
358 for(MachineBasicBlock::iterator RegionEnd = MBB->end(); in runOnMachineFunction()
359 RegionEnd != MBB->begin();) { in runOnMachineFunction()
363 for(;I != MBB->begin(); --I, --RemainingCount) { in runOnMachineFunction()
364 if (TII->isSchedulingBoundary(*std::prev(I), &*MBB, Fn)) in runOnMachineFunction()
367 I = MBB->begin(); in runOnMachineFunction()
372 --RemainingCount; in runOnMachineFunction()