157         if (MO.isReg() && MO.getReg() == R600::ALU_LITERAL_X)  in schedNode()
176   if (MI->getOpcode() != R600::COPY)  in isPhysicalRegCopy()
217   case R600::PRED_X:  in getAluKind()
219   case R600::INTERP_PAIR_XY:  in getAluKind()
220   case R600::INTERP_PAIR_ZW:  in getAluKind()
221   case R600::INTERP_VEC_LOAD:  in getAluKind()
222   case R600::DOT_4:  in getAluKind()
224   case R600::COPY:  in getAluKind()
240      MI->getOpcode() == R600::GROUP_BARRIER) {  in getAluKind()
251   case R600::sub0:  in getAluKind()
253   case R600::sub1:  in getAluKind()
255   case R600::sub2:  in getAluKind()
257   case R600::sub3:  in getAluKind()
265   if (regBelongsToClass(DestReg, &R600::R600_TReg32_XRegClass) ||  in getAluKind()
266       regBelongsToClass(DestReg, &R600::R600_AddrRegClass))  in getAluKind()
268   if (regBelongsToClass(DestReg, &R600::R600_TReg32_YRegClass))  in getAluKind()
270   if (regBelongsToClass(DestReg, &R600::R600_TReg32_ZRegClass))  in getAluKind()
272   if (regBelongsToClass(DestReg, &R600::R600_TReg32_WRegClass))  in getAluKind()
274   if (regBelongsToClass(DestReg, &R600::R600_Reg128RegClass))  in getAluKind()
295   case R600::PRED_X:  in getInstKind()
296   case R600::COPY:  in getInstKind()
297   case R600::CONST_COPY:  in getInstKind()
298   case R600::INTERP_PAIR_XY:  in getInstKind()
299   case R600::INTERP_PAIR_ZW:  in getInstKind()
300   case R600::INTERP_VEC_LOAD:  in getInstKind()
301   case R600::DOT_4:  in getInstKind()
346   int DstIndex = TII->getOperandIdx(MI->getOpcode(), R600::OpName::dst);  in AssignSlot()
363     MRI->constrainRegClass(DestReg, &R600::R600_TReg32_XRegClass);  in AssignSlot()
366     MRI->constrainRegClass(DestReg, &R600::R600_TReg32_YRegClass);  in AssignSlot()
369     MRI->constrainRegClass(DestReg, &R600::R600_TReg32_ZRegClass);  in AssignSlot()
372     MRI->constrainRegClass(DestReg, &R600::R600_TReg32_WRegClass);  in AssignSlot()