Lines Matching refs:MemVT
1039 EVT MemVT = Store->getMemoryVT(); in lowerPrivateTruncStore() local
1072 SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT); in lowerPrivateTruncStore()
1113 EVT MemVT = StoreNode->getMemoryVT(); in LowerSTORE() local
1129 NewChain, DL, Value, Ptr, StoreNode->getPointerInfo(), MemVT, in LowerSTORE()
1139 if (Alignment < MemVT.getStoreSize() && in LowerSTORE()
1140 !allowsMisalignedMemoryAccesses(MemVT, AS, Alignment, in LowerSTORE()
1155 if (MemVT == MVT::i8) { in LowerSTORE()
1158 assert(MemVT == MVT::i16); in LowerSTORE()
1186 Op->getVTList(), Args, MemVT, in LowerSTORE()
1206 if (MemVT.bitsLT(MVT::i32)) in LowerSTORE()
1266 EVT MemVT = Load->getMemoryVT(); in lowerPrivateExtLoad() local
1267 assert(Load->getAlign() >= MemVT.getStoreSize()); in lowerPrivateExtLoad()
1300 EVT MemEltVT = MemVT.getScalarType(); in lowerPrivateExtLoad()
1320 EVT MemVT = LoadNode->getMemoryVT(); in LowerLOAD() local
1324 ExtType != ISD::NON_EXTLOAD && MemVT.bitsLT(MVT::i32)) { in LowerLOAD()
1380 assert(!MemVT.isVector() && (MemVT == MVT::i16 || MemVT == MVT::i8)); in LowerLOAD()
1382 ISD::EXTLOAD, DL, VT, Chain, Ptr, LoadNode->getPointerInfo(), MemVT, in LowerLOAD()
1385 DAG.getValueType(MemVT)); in LowerLOAD()
1474 EVT MemVT = VA.getLocVT(); in LowerFormalArguments() local
1475 if (!VT.isVector() && MemVT.isVector()) { in LowerFormalArguments()
1477 MemVT = MemVT.getVectorElementType(); in LowerFormalArguments()
1495 if (MemVT.getScalarSizeInBits() != VT.getScalarSizeInBits()) { in LowerFormalArguments()
1515 MemVT, Alignment, MachineMemOperand::MONonTemporal | in LowerFormalArguments()
1531 bool R600TargetLowering::canMergeStoresTo(unsigned AS, EVT MemVT, in canMergeStoresTo() argument
1535 return (MemVT.getSizeInBits() <= 32); in canMergeStoresTo()