Lines Matching +full:0 +full:xc400
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
53 O << formatHex(MI->getOperand(OpNo).getImm() & 0xf); in printU4ImmOperand()
69 O << formatHex(static_cast<uint64_t>(Imm & 0xffff)); in printU16ImmOperand()
76 O << formatDec(MI->getOperand(OpNo).getImm() & 0xf); in printU4ImmDecOperand()
81 O << formatDec(MI->getOperand(OpNo).getImm() & 0xff); in printU8ImmDecOperand()
86 O << formatDec(MI->getOperand(OpNo).getImm() & 0xffff); in printU16ImmDecOperand()
92 O << formatHex(MI->getOperand(OpNo).getImm() & 0xffffffff); in printU32ImmOperand()
106 if (Imm != 0) { in printOffset()
123 if (Imm != 0) { in printFlatOffset()
211 // For th = 0 do not print this field in printTH()
212 if (TH == 0) in printTH()
389 if (OpNo == 0) { in printVOPDst()
468 O << formatHex(static_cast<uint64_t>(Imm & 0xffff)); in printImmediateInt16()
473 if (Imm == 0x3C00) in printImmediateFP16()
475 else if (Imm == 0xBC00) in printImmediateFP16()
477 else if (Imm == 0x3800) in printImmediateFP16()
479 else if (Imm == 0xB800) in printImmediateFP16()
481 else if (Imm == 0x4000) in printImmediateFP16()
483 else if (Imm == 0xC000) in printImmediateFP16()
485 else if (Imm == 0x4400) in printImmediateFP16()
487 else if (Imm == 0xC400) in printImmediateFP16()
489 else if (Imm == 0x3118 && STI.hasFeature(AMDGPU::FeatureInv2PiInlineImm)) in printImmediateFP16()
499 if (Imm == 0x3F80) in printImmediateBFloat16()
501 else if (Imm == 0xBF80) in printImmediateBFloat16()
503 else if (Imm == 0x3F00) in printImmediateBFloat16()
505 else if (Imm == 0xBF00) in printImmediateBFloat16()
507 else if (Imm == 0x4000) in printImmediateBFloat16()
509 else if (Imm == 0xC000) in printImmediateBFloat16()
511 else if (Imm == 0x4080) in printImmediateBFloat16()
513 else if (Imm == 0xC080) in printImmediateBFloat16()
515 else if (Imm == 0x3E22 && STI.hasFeature(AMDGPU::FeatureInv2PiInlineImm)) in printImmediateBFloat16()
613 else if (Imm == 0x3e22f983 && in printImmediateFloat32()
664 else if (Imm == 0x3fc45f306dc9c882 && in printImmediate64()
764 return OpNo == 0 && (Desc.TSFlags & SIInstrFlags::DPP) && in needsImpliedVcc()
778 // 0, 1 and 2 are the first printed operands in different cases in printOperand()
781 if ((OpNo == 0 || in printOperand()
954 printDefaultVccOperand(OpNo == 0, STI, O); in printRegularOperand()
984 (InputModifiers & SISrcMods::ABS) == 0) { in printOperandAndFPInputMods()
1015 printDefaultVccOperand(OpNo == 0, STI, O); in printOperandAndFPInputMods()
1044 printDefaultVccOperand(OpNo == 0, STI, O); in printOperandAndIntInputMods()
1056 O << "dpp8:[" << formatDec(Imm & 0x7); in printDPP8()
1058 O << ',' << formatDec((Imm >> (3 * i)) & 0x7); in printDPP8()
1077 O << formatDec(Imm & 0x3) << ','; in printDPPCtrl()
1078 O << formatDec((Imm & 0xc) >> 2) << ','; in printDPPCtrl()
1079 O << formatDec((Imm & 0x30) >> 4) << ','; in printDPPCtrl()
1080 O << formatDec((Imm & 0xc0) >> 6) << ']'; in printDPPCtrl()
1265 printExpSrcN(MI, OpNo, STI, O, 0); in printExpSrc0()
1298 if (Index >= 0) in printExpTgt()
1309 for (int I = 0; I < NumOps; ++I) { in allOpsDefaultValue()
1314 if (HasDstSel && (Ops[0] & SISrcMods::DST_OP_SEL) != 0) in allOpsDefaultValue()
1325 int NumOps = 0; in printPackedModifier()
1343 // Print three values of neg/opsel for wmma instructions (prints 0 when there in printPackedModifier()
1347 NumOps = 0; in printPackedModifier()
1361 NumOps > 0 && in printPackedModifier()
1372 for (int I = 0; I < NumOps; ++I) { in printPackedModifier()
1373 if (I != 0) in printPackedModifier()
1380 O << ',' << !!(Ops[0] & SISrcMods::DST_OP_SEL); in printPackedModifier()
1434 auto Imm = MI->getOperand(OpNo).getImm() & 0x7; in printIndexKey8bit()
1435 if (Imm == 0) in printIndexKey8bit()
1444 auto Imm = MI->getOperand(OpNo).getImm() & 0x7; in printIndexKey16bit()
1445 if (Imm == 0) in printIndexKey16bit()
1456 case 0: in printInterpSlot()
1481 O << '.' << "xyzw"[Chan & 0x3]; in printInterpAttrChan()
1490 if ((Val & ~ENABLE_MASK) != 0) { in printGPRIdxMode()
1584 uint16_t Probe0 = ((0 & AndMask) | OrMask) ^ XorMask; in printSwizzleBitmask()
1589 for (unsigned Mask = 1 << (BITMASK_WIDTH - 1); Mask > 0; Mask >>= 1) { in printSwizzleBitmask()
1594 if (p0 == 0) { in printSwizzleBitmask()
1595 O << "0"; in printSwizzleBitmask()
1600 if (p0 == 0) { in printSwizzleBitmask()
1617 if (Imm == 0) { in printSwizzle()
1626 for (unsigned I = 0; I < LANE_NUM; ++I) { in printSwizzle()
1639 if (AndMask == BITMASK_MAX && OrMask == 0 && llvm::popcount(XorMask) == 1) { in printSwizzle()
1646 } else if (AndMask == BITMASK_MAX && OrMask == 0 && XorMask > 0 && in printSwizzle()
1660 XorMask == 0) { in printSwizzle()
1721 uint64_t Imm16 = MI->getOperand(OpNo).getImm() & 0xffff; in printDepCtr()
1725 int Id = 0; in printDepCtr()
1760 unsigned Value = SImm16 & 0xF; in printSDelayALU()
1775 Value = (SImm16 >> 7) & 0xF; in printSDelayALU()
1783 O << "0"; in printSDelayALU()
1808 if (Imm == 0) { in printEndpgm()