37 bool llvm::checkVOPDRegConstraints(const SIInstrInfo &TII,  in checkVOPDRegConstraints()  argument
47   if (!IsVOPD3 && (TII.isVOP3(FirstMI) || TII.isVOP3(SecondMI)))  in checkVOPDRegConstraints()
49   if (TII.isDPP(FirstMI) || TII.isDPP(SecondMI))  in checkVOPDRegConstraints()
91     const MachineOperand &Src0 = *TII.getNamedOperand(MI, AMDGPU::OpName::src0);  in checkVOPDRegConstraints()
97     } else if (!TII.isInlineConstant(Src0)) {  in checkVOPDRegConstraints()
115         const MachineOperand *Src = TII.getNamedOperand(MI, OpName);  in checkVOPDRegConstraints()
132         if (TII.hasModifiersSet(MI, OpName))  in checkVOPDRegConstraints()
141         const MachineOperand *Mods = TII.getNamedOperand(MI, OpName);  in checkVOPDRegConstraints()
168           *TII.getNamedOperand(SecondMI, AMDGPU::OpName::src2);  in checkVOPDRegConstraints()
174           *TII.getNamedOperand(FirstMI, AMDGPU::OpName::src2);  in checkVOPDRegConstraints()
188 static bool shouldScheduleVOPDAdjacent(const TargetInstrInfo &TII,  in shouldScheduleVOPDAdjacent()  argument
192   const SIInstrInfo &STII = static_cast<const SIInstrInfo &>(TII);  in shouldScheduleVOPDAdjacent()
230     const TargetInstrInfo &TII = *DAG->TII;  in apply()  local
240       if (!shouldScheduleAdjacent(TII, ST, nullptr, *IMI))  in apply()
250             !shouldScheduleAdjacent(TII, ST, IMI, *JMI))  in apply()