81     const TargetRegisterClass *RC;  member
87     SubRegInfo(const TargetRegisterClass *RC_ = nullptr) : RC(RC_) {}  in SubRegInfo()
97   const TargetRegisterClass *getMinSizeReg(const TargetRegisterClass *RC,
116   getRegClassWithShiftedSubregs(const TargetRegisterClass *RC, unsigned RShift,
143   const uint32_t *getSuperRegClassMask(const TargetRegisterClass *RC,
187 GCNRewritePartialRegUses::getSuperRegClassMask(const TargetRegisterClass *RC,  in getSuperRegClassMask()  argument
190       SuperRegMasks.try_emplace({RC, SubRegIdx}, nullptr);  in getSuperRegClassMask()
192     for (SuperRegClassIterator RCI(RC, TRI); RCI.isValid(); ++RCI) {  in getSuperRegClassMask()
210       auto *RC = TRI->getRegClass(ClassID);  in getAllocatableAndAlignedRegClassMask()  local
211       if (RC->isAllocatable() && TRI->isRegClassAligned(RC, AlignNumBits))  in getAllocatableAndAlignedRegClassMask()
220     const TargetRegisterClass *RC, unsigned RShift, unsigned RegNumBits,  in getRegClassWithShiftedSubregs()  argument
223   unsigned RCAlign = TRI->getRegClassAlignmentNumBits(RC);  in getRegClassWithShiftedSubregs()
271     auto *RC = TRI->getRegClass(ClassID);  in getRegClassWithShiftedSubregs()  local
272     unsigned NumBits = TRI->getRegSizeInBits(*RC);  in getRegClassWithShiftedSubregs()
275       MinRC = RC;  in getRegClassWithShiftedSubregs()
290   return (MinRC != RC || RShift != 0) ? MinRC : nullptr;  in getRegClassWithShiftedSubregs()
294 GCNRewritePartialRegUses::getMinSizeReg(const TargetRegisterClass *RC,  in getMinSizeReg()  argument
316     return getRegClassWithShiftedSubregs(RC, Offset, End - Offset, CoverSubreg,  in getMinSizeReg()
324     MaxAlign = std::max(MaxAlign, TRI->getSubRegAlignmentNumBits(RC, SubReg));  in getMinSizeReg()
328     if (TRI->getSubRegAlignmentNumBits(RC, SubReg) != MaxAlign)  in getMinSizeReg()
343   return getRegClassWithShiftedSubregs(RC, RShift, End - RShift, 0, SubRegs);  in getMinSizeReg()
418   auto *RC = MRI->getRegClass(Reg);  in rewriteReg()  local
420                     << ':' << TRI->getRegClassName(RC) << '\n');  in rewriteReg()
431     const TargetRegisterClass *&SubRegRC = I->second.RC;  in rewriteReg()
434       SubRegRC = TRI->getSubRegisterClass(RC, SubReg);  in rewriteReg()
451   auto *NewRC = getMinSizeReg(RC, SubRegs);  in rewriteReg()
459                     << TRI->getRegClassName(RC) << " -> "  in rewriteReg()