Lines Matching refs:IsHazardFn
501 GCNHazardRecognizer::IsHazardFn IsHazard, const MachineBasicBlock *MBB, in getWaitStatesSince()
536 static int getWaitStatesSince(GCNHazardRecognizer::IsHazardFn IsHazard, in getWaitStatesSince()
544 int GCNHazardRecognizer::getWaitStatesSince(IsHazardFn IsHazard, int Limit) { in getWaitStatesSince()
570 IsHazardFn IsHazardDef, in getWaitStatesSinceDef()
574 auto IsHazardFn = [IsHazardDef, TRI, Reg](const MachineInstr &MI) { in getWaitStatesSinceDef() local
578 return getWaitStatesSince(IsHazardFn, Limit); in getWaitStatesSinceDef()
581 int GCNHazardRecognizer::getWaitStatesSinceSetReg(IsHazardFn IsHazard, in getWaitStatesSinceSetReg()
583 auto IsHazardFn = [IsHazard](const MachineInstr &MI) { in getWaitStatesSinceSetReg() local
587 return getWaitStatesSince(IsHazardFn, Limit); in getWaitStatesSinceSetReg()
792 auto IsHazardFn = [TII, GetRegHWReg](const MachineInstr &MI) { in checkGetRegHazards() local
795 int WaitStatesNeeded = getWaitStatesSinceSetReg(IsHazardFn, GetRegWaitStates); in checkGetRegHazards()
805 auto IsHazardFn = [TII, HWReg](const MachineInstr &MI) { in checkSetRegHazards() local
808 int WaitStatesNeeded = getWaitStatesSinceSetReg(IsHazardFn, SetRegWaitStates); in checkSetRegHazards()
874 auto IsHazardFn = [this, Reg, TRI](const MachineInstr &MI) { in checkVALUHazardsHelper() local
880 VALUWaitStates - getWaitStatesSince(IsHazardFn, VALUWaitStates); in checkVALUHazardsHelper()
1062 auto IsHazardFn = [TII](const MachineInstr &MI) { return TII->isVALU(MI); }; in checkRWLaneHazards() local
1065 int WaitStatesSince = getWaitStatesSinceDef(LaneSelectReg, IsHazardFn, in checkRWLaneHazards()
1078 auto IsHazardFn = [TII](const MachineInstr &MI) { in checkRFEHazards() local
1081 int WaitStatesNeeded = getWaitStatesSinceSetReg(IsHazardFn, RFEWaitStates); in checkRFEHazards()
1088 auto IsHazardFn = [TII](const MachineInstr &MI) { return TII->isSALU(MI); }; in checkReadM0Hazards() local
1090 getWaitStatesSinceDef(AMDGPU::M0, IsHazardFn, ReadM0WaitStates); in checkReadM0Hazards()
1117 auto IsHazardFn = [TII, TRI](const MachineInstr &MI) { in fixVcmpxPermlaneHazards() local
1129 if (::getWaitStatesSince(IsHazardFn, MI, IsExpiredFn) == in fixVcmpxPermlaneHazards()
1160 auto IsHazardFn = [TRI, MI](const MachineInstr &I) { in fixVMEMtoScalarWriteHazards() local
1183 if (::getWaitStatesSince(IsHazardFn, MI, IsExpiredFn) == in fixVMEMtoScalarWriteHazards()
1230 auto IsHazardFn = [SDSTReg, TRI](const MachineInstr &I) { in fixSMEMtoVectorWriteHazards() local
1271 if (::getWaitStatesSince(IsHazardFn, MI, IsExpiredFn) == in fixSMEMtoVectorWriteHazards()
1293 auto IsHazardFn = [TRI](const MachineInstr &I) { in fixVcmpxExecWARHazard() local
1314 if (::getWaitStatesSince(IsHazardFn, MI, IsExpiredFn) == in fixVcmpxExecWARHazard()
1374 auto IsHazardFn = [InstType, &IsHazardInst](const MachineInstr &I) { in fixLdsBranchVmemWARHazard() local
1378 auto IsHazardFn = [InstType, IsHazardInst](const MachineInstr &I) { in fixLdsBranchVmemWARHazard() local
1391 return ::getWaitStatesSince(IsHazardFn, &I, IsExpiredFn) != in fixLdsBranchVmemWARHazard()
1395 if (::getWaitStatesSince(IsHazardFn, MI, IsExpiredFn) == in fixLdsBranchVmemWARHazard()
1417 auto IsHazardFn = [this, VDSTReg, &VisitedTrans](const MachineInstr &I) { in fixLdsDirectVALUHazard() local
1436 auto Count = ::getWaitStatesSince(IsHazardFn, MI->getParent(), in fixLdsDirectVALUHazard()
1459 auto IsHazardFn = [this, VDSTReg](const MachineInstr &I) { in fixLdsDirectVMEMHazard() local
1477 if (::getWaitStatesSince(IsHazardFn, MI, IsExpiredFn) == in fixLdsDirectVMEMHazard()
1540 auto IsHazardFn = [&, this](StateType &State, const MachineInstr &I) { in fixVALUPartialForwardingHazard() local
1630 if (!hasHazard<StateType>(State, IsHazardFn, UpdateStateFn, MI->getParent(), in fixVALUPartialForwardingHazard()
1677 auto IsHazardFn = [&, this](StateType &State, const MachineInstr &I) { in fixVALUTransUseHazard() local
1708 if (!hasHazard<StateType>(State, IsHazardFn, UpdateStateFn, MI->getParent(), in fixVALUTransUseHazard()
1728 auto IsHazardFn = [MI, TII, TRI, this](const MachineInstr &I) { in fixWMMAHazards() local
1766 if (::getWaitStatesSince(IsHazardFn, MI, IsExpiredFn) == in fixWMMAHazards()
1892 auto IsHazardFn = [TII](const MachineInstr &I) { in checkNSAtoVMEMHazard() local
1900 return NSAtoVMEMWaitStates - getWaitStatesSince(IsHazardFn, 1); in checkNSAtoVMEMHazard()
1913 auto IsHazardFn = [](const MachineInstr &I) { in checkFPAtomicToDenormModeHazard() local
1939 ::getWaitStatesSince(IsHazardFn, MI, IsExpiredFn); in checkFPAtomicToDenormModeHazard()
2791 auto IsHazardFn = [HazardReg, this](const MachineInstr &I) { in fixVALUMaskWriteHazard() local
2874 if (::getWaitStatesSince(IsHazardFn, MI, IsExpiredFn) == in fixVALUMaskWriteHazard()