228       RowMaskOpnd->getImm() == 0xF && BankMaskOpnd->getImm() == 0xF;  in createDPPInst()
283              (0LL == (Mod0->getImm() & ~(SISrcMods::ABS | SISrcMods::NEG))));  in createDPPInst()
284       DPPInst.addImm(Mod0->getImm());  in createDPPInst()
307              (0LL == (Mod1->getImm() & ~(SISrcMods::ABS | SISrcMods::NEG))));  in createDPPInst()
308       DPPInst.addImm(Mod1->getImm());  in createDPPInst()
340              (0LL == (Mod2->getImm() & ~(SISrcMods::ABS | SISrcMods::NEG))));  in createDPPInst()
341       DPPInst.addImm(Mod2->getImm());  in createDPPInst()
359         DPPInst.addImm(ClampOpr->getImm());  in createDPPInst()
368         DPPInst.addImm(OmodOpr->getImm());  in createDPPInst()
374         OpSel |= (Mod0 ? (!!(Mod0->getImm() & SISrcMods::OP_SEL_0) << 0) : 0);  in createDPPInst()
375         OpSel |= (Mod1 ? (!!(Mod1->getImm() & SISrcMods::OP_SEL_0) << 1) : 0);  in createDPPInst()
376         OpSel |= (Mod2 ? (!!(Mod2->getImm() & SISrcMods::OP_SEL_0) << 2) : 0);  in createDPPInst()
378           OpSel |= !!(Mod0->getImm() & SISrcMods::DST_OP_SEL) << 3;  in createDPPInst()
390         OpSelHi |= (Mod0 ? (!!(Mod0->getImm() & SISrcMods::OP_SEL_1) << 0) : 0);  in createDPPInst()
391         OpSelHi |= (Mod1 ? (!!(Mod1->getImm() & SISrcMods::OP_SEL_1) << 1) : 0);  in createDPPInst()
392         OpSelHi |= (Mod2 ? (!!(Mod2->getImm() & SISrcMods::OP_SEL_1) << 2) : 0);  in createDPPInst()
407         DPPInst.addImm(NegOpr->getImm());  in createDPPInst()
411         DPPInst.addImm(NegHiOpr->getImm());  in createDPPInst()
416         DPPInst.addImm(ByteSelOpr->getImm());  in createDPPInst()
451     if (OldOpnd->getImm() == 0)  in isIdentityValue()
458     if (static_cast<uint32_t>(OldOpnd->getImm()) ==  in isIdentityValue()
464     if (static_cast<int32_t>(OldOpnd->getImm()) ==  in isIdentityValue()
470     if (static_cast<int32_t>(OldOpnd->getImm()) ==  in isIdentityValue()
478     if (OldOpnd->getImm() == 1)  in isIdentityValue()
519   return (Imm->getImm() & Mask) == Value;  in hasNoImmOrEqual()
545     if (!AMDGPU::isLegalDPALU_DPPControl(DppCtrl->getImm())) {  in combineDPPMov()
557   const bool MaskAllLanes = RowMaskOpnd->getImm() == 0xF &&  in combineDPPMov()
558                             BankMaskOpnd->getImm() == 0xF;  in combineDPPMov()
562   bool BoundCtrlZero = BCZOpnd->getImm();  in combineDPPMov()
590     if (OldOpndValue->getImm() == 0) {  in combineDPPMov()
654           FwdSubReg = OrigMI.getOperand(OpNo + 1).getImm();  in combineDPPMov()