235   auto DPPInst = BuildMI(*OrigMI.getParent(), OrigMI,  in createDPPInst()  local
243       DPPInst.add(*Dst);  in createDPPInst()
247       if (TII->isOperandLegal(*DPPInst.getInstr(), NumOperands, SDst)) {  in createDPPInst()
248         DPPInst.add(*SDst);  in createDPPInst()
263       DPPInst.addReg(CombOldVGPR.Reg, Def ? 0 : RegState::Undef,  in createDPPInst()
284       DPPInst.addImm(Mod0->getImm());  in createDPPInst()
287       DPPInst.addImm(0);  in createDPPInst()
293     if (!TII->isOperandLegal(*DPPInst.getInstr(), NumOperands, Src0)) {  in createDPPInst()
298     DPPInst.add(*Src0);  in createDPPInst()
299     DPPInst->getOperand(NumOperands).setIsKill(false);  in createDPPInst()
308       DPPInst.addImm(Mod1->getImm());  in createDPPInst()
311       DPPInst.addImm(0);  in createDPPInst()
321         assert(getOperandSize(*DPPInst, Src0Idx, *MRI) ==  in createDPPInst()
322                    getOperandSize(*DPPInst, NumOperands, *MRI) &&  in createDPPInst()
326       if (!TII->isOperandLegal(*DPPInst.getInstr(), OpNum, Src1)) {  in createDPPInst()
331       DPPInst.add(*Src1);  in createDPPInst()
341       DPPInst.addImm(Mod2->getImm());  in createDPPInst()
346       if (!TII->getNamedOperand(*DPPInst.getInstr(), AMDGPU::OpName::src2) ||  in createDPPInst()
347           !TII->isOperandLegal(*DPPInst.getInstr(), NumOperands, Src2)) {  in createDPPInst()
352       DPPInst.add(*Src2);  in createDPPInst()
359         DPPInst.addImm(ClampOpr->getImm());  in createDPPInst()
364         DPPInst.add(*VdstInOpr);  in createDPPInst()
368         DPPInst.addImm(OmodOpr->getImm());  in createDPPInst()
386           DPPInst.addImm(OpSel);  in createDPPInst()
403           DPPInst.addImm(OpSelHi);  in createDPPInst()
407         DPPInst.addImm(NegOpr->getImm());  in createDPPInst()
411         DPPInst.addImm(NegHiOpr->getImm());  in createDPPInst()
416         DPPInst.addImm(ByteSelOpr->getImm());  in createDPPInst()
419     DPPInst.add(*TII->getNamedOperand(MovMI, AMDGPU::OpName::dpp_ctrl));  in createDPPInst()
420     DPPInst.add(*TII->getNamedOperand(MovMI, AMDGPU::OpName::row_mask));  in createDPPInst()
421     DPPInst.add(*TII->getNamedOperand(MovMI, AMDGPU::OpName::bank_mask));  in createDPPInst()
422     DPPInst.addImm(CombBCZ ? 1 : 0);  in createDPPInst()
426     DPPInst.getInstr()->eraseFromParent();  in createDPPInst()
429   LLVM_DEBUG(dbgs() << "  combined:  " << *DPPInst.getInstr());  in createDPPInst()
430   return DPPInst.getInstr();  in createDPPInst()
706       if (auto *DPPInst = createDPPInst(OrigMI, MovMI, CombOldVGPR,  in combineDPPMov()  local
708         DPPMIs.push_back(DPPInst);  in combineDPPMov()
718         if (auto *DPPInst =  in combineDPPMov()  local
721           DPPMIs.push_back(DPPInst);  in combineDPPMov()