Lines Matching full:amdgpu
40 #include "AMDGPU.h"
128 if (AMDGPU::isTrue16Inst(Op)) in isShrinkable()
130 if (const auto *SDst = TII->getNamedOperand(MI, AMDGPU::OpName::sdst)) { in isShrinkable()
140 if (!hasNoImmOrEqual(MI, AMDGPU::OpName::src0_modifiers, 0, Mask) || in isShrinkable()
141 !hasNoImmOrEqual(MI, AMDGPU::OpName::src1_modifiers, 0, Mask) || in isShrinkable()
142 !hasNoImmOrEqual(MI, AMDGPU::OpName::clamp, 0) || in isShrinkable()
143 !hasNoImmOrEqual(MI, AMDGPU::OpName::omod, 0) || in isShrinkable()
144 !hasNoImmOrEqual(MI, AMDGPU::OpName::byte_sel, 0)) { in isShrinkable()
152 int DPP32 = AMDGPU::getDPPOp32(Op); in getDPPOp()
155 int E32 = AMDGPU::getVOPe32(Op); in getDPPOp()
156 DPP32 = (E32 == -1) ? -1 : AMDGPU::getDPPOp32(E32); in getDPPOp()
162 DPP64 = AMDGPU::getDPPOp64(Op); in getDPPOp()
179 case AMDGPU::IMPLICIT_DEF: in getOldOpndValue()
181 case AMDGPU::COPY: in getOldOpndValue()
182 case AMDGPU::V_MOV_B32_e32: in getOldOpndValue()
183 case AMDGPU::V_MOV_B64_PSEUDO: in getOldOpndValue()
184 case AMDGPU::V_MOV_B64_e32: in getOldOpndValue()
185 case AMDGPU::V_MOV_B64_e64: { in getOldOpndValue()
210 assert(MovMI.getOpcode() == AMDGPU::V_MOV_B32_dpp || in createDPPInst()
211 MovMI.getOpcode() == AMDGPU::V_MOV_B64_dpp || in createDPPInst()
212 MovMI.getOpcode() == AMDGPU::V_MOV_B64_DPP_PSEUDO); in createDPPInst()
221 int OrigOpE32 = AMDGPU::getVOPe32(OrigOp); in createDPPInst()
223 auto *RowMaskOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::row_mask); in createDPPInst()
225 auto *BankMaskOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::bank_mask); in createDPPInst()
242 if (auto *Dst = TII->getNamedOperand(OrigMI, AMDGPU::OpName::vdst)) { in createDPPInst()
246 if (auto *SDst = TII->getNamedOperand(OrigMI, AMDGPU::OpName::sdst)) { in createDPPInst()
254 const int OldIdx = AMDGPU::getNamedOperandIdx(DPPOp, AMDGPU::OpName::old); in createDPPInst()
260 TII->getNamedOperand(MovMI, AMDGPU::OpName::vdst)->getReg()), in createDPPInst()
278 auto *Mod0 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src0_modifiers); in createDPPInst()
280 assert(NumOperands == AMDGPU::getNamedOperandIdx(DPPOp, in createDPPInst()
281 AMDGPU::OpName::src0_modifiers)); in createDPPInst()
286 } else if (AMDGPU::hasNamedOperand(DPPOp, AMDGPU::OpName::src0_modifiers)) { in createDPPInst()
290 auto *Src0 = TII->getNamedOperand(MovMI, AMDGPU::OpName::src0); in createDPPInst()
302 auto *Mod1 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src1_modifiers); in createDPPInst()
304 assert(NumOperands == AMDGPU::getNamedOperandIdx(DPPOp, in createDPPInst()
305 AMDGPU::OpName::src1_modifiers)); in createDPPInst()
310 } else if (AMDGPU::hasNamedOperand(DPPOp, AMDGPU::OpName::src1_modifiers)) { in createDPPInst()
314 auto *Src1 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src1); in createDPPInst()
335 auto *Mod2 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src2_modifiers); in createDPPInst()
338 AMDGPU::getNamedOperandIdx(DPPOp, AMDGPU::OpName::src2_modifiers)); in createDPPInst()
344 auto *Src2 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src2); in createDPPInst()
346 if (!TII->getNamedOperand(*DPPInst.getInstr(), AMDGPU::OpName::src2) || in createDPPInst()
357 auto *ClampOpr = TII->getNamedOperand(OrigMI, AMDGPU::OpName::clamp); in createDPPInst()
358 if (ClampOpr && AMDGPU::hasNamedOperand(DPPOp, AMDGPU::OpName::clamp)) { in createDPPInst()
361 auto *VdstInOpr = TII->getNamedOperand(OrigMI, AMDGPU::OpName::vdst_in); in createDPPInst()
363 AMDGPU::hasNamedOperand(DPPOp, AMDGPU::OpName::vdst_in)) { in createDPPInst()
366 auto *OmodOpr = TII->getNamedOperand(OrigMI, AMDGPU::OpName::omod); in createDPPInst()
367 if (OmodOpr && AMDGPU::hasNamedOperand(DPPOp, AMDGPU::OpName::omod)) { in createDPPInst()
372 if (TII->getNamedOperand(OrigMI, AMDGPU::OpName::op_sel)) { in createDPPInst()
385 if (AMDGPU::hasNamedOperand(DPPOp, AMDGPU::OpName::op_sel)) in createDPPInst()
388 if (TII->getNamedOperand(OrigMI, AMDGPU::OpName::op_sel_hi)) { in createDPPInst()
402 if (AMDGPU::hasNamedOperand(DPPOp, AMDGPU::OpName::op_sel_hi)) in createDPPInst()
405 auto *NegOpr = TII->getNamedOperand(OrigMI, AMDGPU::OpName::neg_lo); in createDPPInst()
406 if (NegOpr && AMDGPU::hasNamedOperand(DPPOp, AMDGPU::OpName::neg_lo)) { in createDPPInst()
409 auto *NegHiOpr = TII->getNamedOperand(OrigMI, AMDGPU::OpName::neg_hi); in createDPPInst()
410 if (NegHiOpr && AMDGPU::hasNamedOperand(DPPOp, AMDGPU::OpName::neg_hi)) { in createDPPInst()
413 auto *ByteSelOpr = TII->getNamedOperand(OrigMI, AMDGPU::OpName::byte_sel); in createDPPInst()
415 AMDGPU::hasNamedOperand(DPPOp, AMDGPU::OpName::byte_sel)) { in createDPPInst()
419 DPPInst.add(*TII->getNamedOperand(MovMI, AMDGPU::OpName::dpp_ctrl)); in createDPPInst()
420 DPPInst.add(*TII->getNamedOperand(MovMI, AMDGPU::OpName::row_mask)); in createDPPInst()
421 DPPInst.add(*TII->getNamedOperand(MovMI, AMDGPU::OpName::bank_mask)); in createDPPInst()
437 case AMDGPU::V_ADD_U32_e32: in isIdentityValue()
438 case AMDGPU::V_ADD_U32_e64: in isIdentityValue()
439 case AMDGPU::V_ADD_CO_U32_e32: in isIdentityValue()
440 case AMDGPU::V_ADD_CO_U32_e64: in isIdentityValue()
441 case AMDGPU::V_OR_B32_e32: in isIdentityValue()
442 case AMDGPU::V_OR_B32_e64: in isIdentityValue()
443 case AMDGPU::V_SUBREV_U32_e32: in isIdentityValue()
444 case AMDGPU::V_SUBREV_U32_e64: in isIdentityValue()
445 case AMDGPU::V_SUBREV_CO_U32_e32: in isIdentityValue()
446 case AMDGPU::V_SUBREV_CO_U32_e64: in isIdentityValue()
447 case AMDGPU::V_MAX_U32_e32: in isIdentityValue()
448 case AMDGPU::V_MAX_U32_e64: in isIdentityValue()
449 case AMDGPU::V_XOR_B32_e32: in isIdentityValue()
450 case AMDGPU::V_XOR_B32_e64: in isIdentityValue()
454 case AMDGPU::V_AND_B32_e32: in isIdentityValue()
455 case AMDGPU::V_AND_B32_e64: in isIdentityValue()
456 case AMDGPU::V_MIN_U32_e32: in isIdentityValue()
457 case AMDGPU::V_MIN_U32_e64: in isIdentityValue()
462 case AMDGPU::V_MIN_I32_e32: in isIdentityValue()
463 case AMDGPU::V_MIN_I32_e64: in isIdentityValue()
468 case AMDGPU::V_MAX_I32_e32: in isIdentityValue()
469 case AMDGPU::V_MAX_I32_e64: in isIdentityValue()
474 case AMDGPU::V_MUL_I32_I24_e32: in isIdentityValue()
475 case AMDGPU::V_MUL_I32_I24_e64: in isIdentityValue()
476 case AMDGPU::V_MUL_U32_U24_e32: in isIdentityValue()
477 case AMDGPU::V_MUL_U32_U24_e64: in isIdentityValue()
490 auto *Src1 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src1); in createDPPInst()
500 auto MovDst = TII->getNamedOperand(MovMI, AMDGPU::OpName::vdst); in createDPPInst()
523 assert(MovMI.getOpcode() == AMDGPU::V_MOV_B32_dpp || in combineDPPMov()
524 MovMI.getOpcode() == AMDGPU::V_MOV_B64_dpp || in combineDPPMov()
525 MovMI.getOpcode() == AMDGPU::V_MOV_B64_DPP_PSEUDO); in combineDPPMov()
528 auto *DstOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::vdst); in combineDPPMov()
541 if (MovMI.getOpcode() == AMDGPU::V_MOV_B64_DPP_PSEUDO || in combineDPPMov()
542 MovMI.getOpcode() == AMDGPU::V_MOV_B64_dpp) { in combineDPPMov()
543 auto *DppCtrl = TII->getNamedOperand(MovMI, AMDGPU::OpName::dpp_ctrl); in combineDPPMov()
545 if (!AMDGPU::isLegalDPALU_DPPControl(DppCtrl->getImm())) { in combineDPPMov()
553 auto *RowMaskOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::row_mask); in combineDPPMov()
555 auto *BankMaskOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::bank_mask); in combineDPPMov()
560 auto *BCZOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::bound_ctrl); in combineDPPMov()
564 auto *OldOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::old); in combineDPPMov()
565 auto *SrcOpnd = TII->getNamedOperand(MovMI, AMDGPU::OpName::src0); in combineDPPMov()
619 TII->get(AMDGPU::IMPLICIT_DEF), CombOldVGPR.Reg); in combineDPPMov()
639 assert((TII->get(OrigOp).getSize() != 4 || !AMDGPU::isTrue16Inst(OrigOp)) && in combineDPPMov()
641 if (OrigOp == AMDGPU::REG_SEQUENCE) { in combineDPPMov()
679 if (OrigMI.modifiesRegister(AMDGPU::EXEC, ST->getRegisterInfo())) { in combineDPPMov()
684 auto *Src0 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src0); in combineDPPMov()
685 auto *Src1 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src1); in combineDPPMov()
691 auto *Src2 = TII->getNamedOperand(OrigMI, AMDGPU::OpName::src2); in combineDPPMov()
763 if (MI.getOpcode() == AMDGPU::V_MOV_B32_dpp && combineDPPMov(MI)) { in runOnMachineFunction()
766 } else if (MI.getOpcode() == AMDGPU::V_MOV_B64_DPP_PSEUDO || in runOnMachineFunction()
767 MI.getOpcode() == AMDGPU::V_MOV_B64_dpp) { in runOnMachineFunction()