169         Inst, DAsm->createRegOperand(AMDGPU::RegClass##RegClassID, Imm));      \
704         MI.insert(MI.begin() + VAddrIdx, createRegOperand(VAddrRCID, Bytes[i]));  in getInstruction()
785       insertNamedMCOperand(MI, createRegOperand(AMDGPU::VCC),  in convertSDWAInst()
1175 MCOperand AMDGPUDisassembler::createRegOperand(unsigned int RegId) const {  in createRegOperand()  function in AMDGPUDisassembler
1180 MCOperand AMDGPUDisassembler::createRegOperand(unsigned RegClassID,  in createRegOperand()  function in AMDGPUDisassembler
1186   return createRegOperand(RegCl.getRegister(Val));  in createRegOperand()
1236   return createRegOperand(SRegClassID, Val >> shift);  in createSRegOperand()
1242   return createRegOperand(AMDGPU::VGPR_16RegClassID, RegIdxInVGPR16);  in createVGPR16Operand()
1532     return createRegOperand(IsAGPR ? getAgprClassId(Width)  in decodeSrcOp()
1596   return createRegOperand(getVgprClassId(Width), Val);  in decodeVOPDDstYOp()
1604   case 102: return createRegOperand(FLAT_SCR_LO);  in decodeSpecialReg32()
1605   case 103: return createRegOperand(FLAT_SCR_HI);  in decodeSpecialReg32()
1606   case 104: return createRegOperand(XNACK_MASK_LO);  in decodeSpecialReg32()
1607   case 105: return createRegOperand(XNACK_MASK_HI);  in decodeSpecialReg32()
1608   case 106: return createRegOperand(VCC_LO);  in decodeSpecialReg32()
1609   case 107: return createRegOperand(VCC_HI);  in decodeSpecialReg32()
1610   case 108: return createRegOperand(TBA_LO);  in decodeSpecialReg32()
1611   case 109: return createRegOperand(TBA_HI);  in decodeSpecialReg32()
1612   case 110: return createRegOperand(TMA_LO);  in decodeSpecialReg32()
1613   case 111: return createRegOperand(TMA_HI);  in decodeSpecialReg32()
1615     return isGFX11Plus() ? createRegOperand(SGPR_NULL) : createRegOperand(M0);  in decodeSpecialReg32()
1617     return isGFX11Plus() ? createRegOperand(M0) : createRegOperand(SGPR_NULL);  in decodeSpecialReg32()
1618   case 126: return createRegOperand(EXEC_LO);  in decodeSpecialReg32()
1619   case 127: return createRegOperand(EXEC_HI);  in decodeSpecialReg32()
1620   case 235: return createRegOperand(SRC_SHARED_BASE_LO);  in decodeSpecialReg32()
1621   case 236: return createRegOperand(SRC_SHARED_LIMIT_LO);  in decodeSpecialReg32()
1622   case 237: return createRegOperand(SRC_PRIVATE_BASE_LO);  in decodeSpecialReg32()
1623   case 238: return createRegOperand(SRC_PRIVATE_LIMIT_LO);  in decodeSpecialReg32()
1624   case 239: return createRegOperand(SRC_POPS_EXITING_WAVE_ID);  in decodeSpecialReg32()
1625   case 251: return createRegOperand(SRC_VCCZ);  in decodeSpecialReg32()
1626   case 252: return createRegOperand(SRC_EXECZ);  in decodeSpecialReg32()
1627   case 253: return createRegOperand(SRC_SCC);  in decodeSpecialReg32()
1628   case 254: return createRegOperand(LDS_DIRECT);  in decodeSpecialReg32()
1639   case 102: return createRegOperand(FLAT_SCR);  in decodeSpecialReg64()
1640   case 104: return createRegOperand(XNACK_MASK);  in decodeSpecialReg64()
1641   case 106: return createRegOperand(VCC);  in decodeSpecialReg64()
1642   case 108: return createRegOperand(TBA);  in decodeSpecialReg64()
1643   case 110: return createRegOperand(TMA);  in decodeSpecialReg64()
1646       return createRegOperand(SGPR_NULL);  in decodeSpecialReg64()
1650       return createRegOperand(SGPR_NULL);  in decodeSpecialReg64()
1652   case 126: return createRegOperand(EXEC);  in decodeSpecialReg64()
1653   case 235: return createRegOperand(SRC_SHARED_BASE);  in decodeSpecialReg64()
1654   case 236: return createRegOperand(SRC_SHARED_LIMIT);  in decodeSpecialReg64()
1655   case 237: return createRegOperand(SRC_PRIVATE_BASE);  in decodeSpecialReg64()
1656   case 238: return createRegOperand(SRC_PRIVATE_LIMIT);  in decodeSpecialReg64()
1657   case 239: return createRegOperand(SRC_POPS_EXITING_WAVE_ID);  in decodeSpecialReg64()
1658   case 251: return createRegOperand(SRC_VCCZ);  in decodeSpecialReg64()
1659   case 252: return createRegOperand(SRC_EXECZ);  in decodeSpecialReg64()
1660   case 253: return createRegOperand(SRC_SCC);  in decodeSpecialReg64()
1679       return createRegOperand(getVgprClassId(Width),  in decodeSDWASrc()
1705     return createRegOperand(getVgprClassId(Width), Val);  in decodeSDWASrc()
1739   return createRegOperand(IsWave64 ? AMDGPU::VCC : AMDGPU::VCC_LO);  in decodeSDWAVopcDst()