Lines Matching refs:MCOperand
86 addOperand(MCInst &Inst, const MCOperand& Opnd) { in addOperand()
93 static int insertNamedMCOperand(MCInst &MI, const MCOperand &Op, in insertNamedMCOperand()
116 return addOperand(Inst, MCOperand::createImm(Imm)); in decodeSOPPBrTarget()
130 return addOperand(Inst, MCOperand::createImm(Offset)); in decodeSMEMOffset()
381 const MCOperand &Op = Inst.getOperand(OpIdx); in IsAGPROperand()
633 insertNamedMCOperand(MI, MCOperand::createImm(0), in getInstruction()
640 insertNamedMCOperand(MI, MCOperand::createImm(0), in getInstruction()
646 insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::gds); in getInstruction()
658 insertNamedMCOperand(MI, MCOperand::createImm(CPol), in getInstruction()
675 MI.insert(TFEIter, MCOperand::createImm(0)); in getInstruction()
686 MI.insert(SWZIter, MCOperand::createImm(0)); in getInstruction()
736 MCOperand::createReg(MI.getOperand(Tied).getReg()), in getInstruction()
755 insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::vm); in convertEXPInst()
756 insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::compr); in convertEXPInst()
771 insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::op_sel); in convertVINTERPInst()
780 insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::clamp); in convertSDWAInst()
789 insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::omod); in convertSDWAInst()
851 MCOperand &Op = MI.getOperand(OpIdx); in convertTrue16OpSel()
857 const MCOperand &OpMods = MI.getOperand(OpModsIdx); in convertTrue16OpSel()
890 insertNamedMCOperand(MI, MCOperand::createReg(0), AMDGPU::OpName::old); in convertMacDPPInst()
891 insertNamedMCOperand(MI, MCOperand::createImm(0), in convertMacDPPInst()
908 insertNamedMCOperand(MI, MCOperand::createImm(Mods.OpSel), in convertDPP8Inst()
914 insertNamedMCOperand(MI, MCOperand::createImm(0), in convertDPP8Inst()
919 insertNamedMCOperand(MI, MCOperand::createImm(0), in convertDPP8Inst()
937 insertNamedMCOperand(MI, MCOperand::createImm(Mods.OpSel), in convertVOP3DPPInst()
973 addOperand(MI, MCOperand::createImm(BaseOpcode->A16)); in convertMIMGInst()
1074 MI.getOperand(VDataIdx) = MCOperand::createReg(NewVdata); in convertMIMGInst()
1078 MI.getOperand(VDstIdx) = MCOperand::createReg(NewVdata); in convertMIMGInst()
1083 MI.getOperand(VAddrSAIdx) = MCOperand::createReg(NewVAddrSA); in convertMIMGInst()
1101 insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::vdst_in); in convertVOP3PDPPInst()
1105 insertNamedMCOperand(MI, MCOperand::createImm(Mods.OpSel), in convertVOP3PDPPInst()
1109 insertNamedMCOperand(MI, MCOperand::createImm(Mods.OpSelHi), in convertVOP3PDPPInst()
1113 insertNamedMCOperand(MI, MCOperand::createImm(Mods.NegLo), in convertVOP3PDPPInst()
1117 insertNamedMCOperand(MI, MCOperand::createImm(Mods.NegHi), in convertVOP3PDPPInst()
1128 insertNamedMCOperand(MI, MCOperand::createReg(0), AMDGPU::OpName::old); in convertVOPCDPPInst()
1132 insertNamedMCOperand(MI, MCOperand::createImm(0), in convertVOPCDPPInst()
1137 insertNamedMCOperand(MI, MCOperand::createImm(0), in convertVOPCDPPInst()
1145 insertNamedMCOperand(MI, MCOperand::createImm(Literal), in convertFMAanyK()
1165 MCOperand AMDGPUDisassembler::errOperand(unsigned V, in errOperand()
1171 return MCOperand(); in errOperand()
1175 MCOperand AMDGPUDisassembler::createRegOperand(unsigned int RegId) const { in createRegOperand()
1176 return MCOperand::createReg(AMDGPU::getMCReg(RegId, STI)); in createRegOperand()
1180 MCOperand AMDGPUDisassembler::createRegOperand(unsigned RegClassID, in createRegOperand()
1190 MCOperand AMDGPUDisassembler::createSRegOperand(unsigned SRegClassID, in createSRegOperand()
1239 MCOperand AMDGPUDisassembler::createVGPR16Operand(unsigned RegIdx, in createVGPR16Operand()
1246 MCOperand
1257 return MCOperand::createImm(Literal); in decodeMandatoryLiteralConstant()
1260 MCOperand AMDGPUDisassembler::decodeLiteralConstant(bool ExtendFP64) const { in decodeLiteralConstant()
1274 return MCOperand::createImm(ExtendFP64 ? Literal64 : Literal); in decodeLiteralConstant()
1277 MCOperand AMDGPUDisassembler::decodeIntImmed(unsigned Imm) { in decodeIntImmed()
1281 return MCOperand::createImm((Imm <= INLINE_INTEGER_C_POSITIVE_MAX) ? in decodeIntImmed()
1392 MCOperand AMDGPUDisassembler::decodeFPImmed(unsigned ImmWidth, unsigned Imm, in decodeFPImmed()
1404 return MCOperand::createImm(getInlineImmVal32(Imm)); in decodeFPImmed()
1406 return MCOperand::createImm(getInlineImmVal64(Imm)); in decodeFPImmed()
1408 return MCOperand::createImm(getInlineImmVal16(Imm, Sema)); in decodeFPImmed()
1520 MCOperand AMDGPUDisassembler::decodeSrcOp(const OpWidthTy Width, unsigned Val, in decodeSrcOp()
1539 MCOperand
1568 return MCOperand::createImm(LITERAL_CONST); in decodeNonVGPRSrcOp()
1587 MCOperand AMDGPUDisassembler::decodeVOPDDstYOp(MCInst &Inst, in decodeVOPDDstYOp()
1599 MCOperand AMDGPUDisassembler::decodeSpecialReg32(unsigned Val) const { in decodeSpecialReg32()
1635 MCOperand AMDGPUDisassembler::decodeSpecialReg64(unsigned Val) const { in decodeSpecialReg64()
1666 MCOperand
1709 MCOperand AMDGPUDisassembler::decodeSDWASrc16(unsigned Val) const { in decodeSDWASrc16()
1713 MCOperand AMDGPUDisassembler::decodeSDWASrc32(unsigned Val) const { in decodeSDWASrc32()
1717 MCOperand AMDGPUDisassembler::decodeSDWAVopcDst(unsigned Val) const { in decodeSDWAVopcDst()
1742 MCOperand AMDGPUDisassembler::decodeBoolReg(unsigned Val) const { in decodeBoolReg()
1748 MCOperand AMDGPUDisassembler::decodeSplitBarrier(unsigned Val) const { in decodeSplitBarrier()
1752 MCOperand AMDGPUDisassembler::decodeDpp8FI(unsigned Val) const { in decodeDpp8FI()
1754 return MCOperand(); in decodeDpp8FI()
1755 return MCOperand::createImm(Val); in decodeDpp8FI()
1758 MCOperand AMDGPUDisassembler::decodeVersionImm(unsigned Imm) const { in decodeVersionImm()
1769 return MCOperand::createImm(Imm); in decodeVersionImm()
1790 return MCOperand::createExpr(E); in decodeVersionImm()
2421 Inst.addOperand(MCOperand::createExpr(Add)); in tryAddingSymbolicOperand()