68   const AMDGPUAsmParser *AsmParser;  member in __anon6862249c0111::AMDGPUOperand
72       : Kind(Kind_), AsmParser(AsmParser_) {}  in AMDGPUOperand()
1154   static AMDGPUOperand::Ptr CreateImm(const AMDGPUAsmParser *AsmParser,  in CreateImm()  argument
1158     auto Op = std::make_unique<AMDGPUOperand>(Immediate, AsmParser);  in CreateImm()
1169   static AMDGPUOperand::Ptr CreateToken(const AMDGPUAsmParser *AsmParser,  in CreateToken()  argument
1172     auto Res = std::make_unique<AMDGPUOperand>(Token, AsmParser);  in CreateToken()
1180   static AMDGPUOperand::Ptr CreateReg(const AMDGPUAsmParser *AsmParser,  in CreateReg()  argument
1183     auto Op = std::make_unique<AMDGPUOperand>(Register, AsmParser);  in CreateReg()
1191   static AMDGPUOperand::Ptr CreateExpr(const AMDGPUAsmParser *AsmParser,  in CreateExpr()  argument
1193     auto Op = std::make_unique<AMDGPUOperand>(Expression, AsmParser);  in CreateExpr()
2030                                           AsmParser->hasInv2PiInlineImm());  in isInlinableImm()
2061                                      AsmParser->hasInv2PiInlineImm());  in isInlinableImm()
2067       AsmParser->hasInv2PiInlineImm());  in isInlinableImm()
2073                                         AsmParser->hasInv2PiInlineImm());  in isInlinableImm()
2083       type, AsmParser->hasInv2PiInlineImm());  in isInlinableImm()
2088     AsmParser->hasInv2PiInlineImm());  in isInlinableImm()
2145   return isRegKind() && AsmParser->getMRI()->getRegClass(RCID).contains(getReg());  in isRegClass()
2152           AsmParser->getFeatureBits()[AMDGPU::FeatureDPALU_DPP]);  in isVRegWithInputMods()
2161   if (AsmParser->isVI())  in isSDWAOperand()
2163   if (AsmParser->isGFX9Plus())  in isSDWAOperand()
2185   auto FB = AsmParser->getFeatureBits();  in isBoolReg()
2213   if (AMDGPU::isSISrcOperand(AsmParser->getMII()->get(Inst.getOpcode()),  in addImmOperands()
2226   const auto& InstDesc = AsmParser->getMII()->get(Inst.getOpcode());  in addLiteralImmOperand()
2248                                        AsmParser->hasInv2PiInlineImm())) {  in addLiteralImmOperand()
2258           const_cast<AMDGPUAsmParser *>(AsmParser)->Warning(Inst.getLoc(),  in addLiteralImmOperand()
2281       if (AsmParser->hasInv2PiInlineImm() && Literal == 0x3fc45f306725feed) {  in addLiteralImmOperand()
2363                                      AsmParser->hasInv2PiInlineImm())) {  in addLiteralImmOperand()
2378     if (AMDGPU::isInlinableLiteral64(Val, AsmParser->hasInv2PiInlineImm())) {  in addLiteralImmOperand()
2411                                        AsmParser->hasInv2PiInlineImm())) {  in addLiteralImmOperand()
2427                                      AsmParser->hasInv2PiInlineImm())) {  in addLiteralImmOperand()
2448                                           AsmParser->hasInv2PiInlineImm()));  in addLiteralImmOperand()
2458                                           AsmParser->hasInv2PiInlineImm()));  in addLiteralImmOperand()
2478   Inst.addOperand(MCOperand::createReg(AMDGPU::getMCReg(getReg(), AsmParser->getSTI())));  in addRegOperands()