Lines Matching full:must

34 /// The version of the amd_*_code_t struct. Minor versions must be
67 /// (AMD_CODE_PROPERTY_*_SHIFT) for convenient access. Unused bits must be 0.
79 /// The total number of SGPRuser data registers requested must not
141 /// code for private memory. This must be 2, 4, 8 or 16. This value
148 /// element size is 4 (32-bits or dword) and a 64-bit value must be
156 /// The value used must match the value that the runtime configures
165 /// Are global memory addresses 64 bits. Must match
167 /// HSA_MACHINE_LARGE. Must also match
180 /// know private segment size, and additional space must be added
214 /// enabled in this bit set must have the value of all 0s.
217 /// If enableBreakExceptions is not enabled then must be 0, otherwise must be
218 /// non-0 and specifies the set of HSAIL exceptions that must have the BREAK
224 /// enablebreakexceptions control directive, then they must be equal or a
228 /// If enableDetectExceptions is not enabled then must be 0, otherwise must be
229 /// non-0 and specifies the set of HSAIL exceptions that must have the DETECT
236 /// enabledetectexceptions control directive, then they must be equal or a
240 /// If maxDynamicGroupSize is not enabled then must be 0, and any amount of
244 /// maxdynamicsize control directives, then the values must be the same, and
245 /// must be the same as this argument if it is enabled. This value can be used
257 /// If maxFlatGridSize is not enabled then must be 0, otherwise must be greater
262 /// If maxFlatWorkgroupSize is not enabled then must be 0, otherwise must be
267 /// If requestedWorkgroupsPerCu is not enabled then must be 0, and the
274 /// must be the same. This can be used to determine the number of resources
284 /// If not enabled then all elements for Dim3 must be 0, otherwise every
285 /// element must be greater than 0. See HSA Programmer's Reference Manual
289 /// If requiredWorkgroupSize is not enabled then all elements for Dim3 must be
291 /// consistent with the dispatch dimensions. Otherwise, the code produced must
293 /// specified range must be 0. It must be consistent with required_dimensions
296 /// values must be the same. Specifying a value can allow the finalizer to
302 /// If requiredDim is not enabled then must be 0 and the produced kernel code
304 /// 1..3 and the code produced must only be dispatched with a dimension that
307 /// values must be the same. This can be used to optimize the code generated to
312 /// Reserved. Must be 0.
344 /// segments using a segment address. It must be set as follows:
351 /// - Swizzle enable: SH_STATIC_MEM_CONFIG.SWIZZLE_ENABLE (must be 1 for
356 /// - Element_size: SH_STATIC_MEM_CONFIG.ELEMENT_SIZE (will be DWORD, must
358 /// - Index_stride: SH_STATIC_MEM_CONFIG.INDEX_STRIDE (will be 64 as must
359 /// be number of wavefront lanes for scratch, must agree with
392 /// Scratch Wave Offset must be added by the kernel code and moved to
401 /// The kernel code must move to SGPRn-3 for use as the FLAT SCRATCH SIZE in
465 /// dispatch scratch base. Must be used as an offset with Private/Spill/Arg
466 /// segment address when using Scratch Segment Buffer. It must be added to
520 /// When the Global Buffer is used to access the Kernarg segment, must add the
537 /// requirements (SQ cache line is 16). The code must be position
553 /// Reserved. Must be 0.
566 /// is_dynamic_callstack is 1 then additional space must be added to
576 /// Number of byte of GDS required by kernel dispatch. Must be 0 if
587 /// fbarriers then that amount must already be included in the
601 /// If reserved_vgpr_count is 0 then must be 0. Otherwise, this is the
610 /// If reserved_sgpr_count is 0 then must be 0. Otherwise, this is the
619 /// If is_debug_supported is 0 then must be 0. Otherwise, this is the
625 /// If is_debug_supported is 0 then must be 0. Otherwise, this is the
632 /// the specified memory segment. Expressed as a power of two. Must
638 /// Wavefront size expressed as a power of two. Must be a power of 2