131       const RegisterBank *SrcBank = RBI.getRegBank(SrcReg, MRI, *RBI.TRI);  in applyBank()  local
132       if (SrcBank == &AMDGPU::VCCRegBank) {  in applyBank()
1946   const RegisterBank &SrcBank =  in foldExtractEltToCmpSelect()  local
1951      SrcBank == AMDGPU::SGPRRegBank &&  in foldExtractEltToCmpSelect()
2044   const RegisterBank &SrcBank =  in foldInsertEltToCmpSelect()  local
2051      SrcBank == AMDGPU::SGPRRegBank &&  in foldInsertEltToCmpSelect()
2232         const RegisterBank *SrcBank = getRegBank(SrcReg, MRI, *TRI);  in applyMappingImpl()  local
2234         if (SrcBank != &AMDGPU::VCCRegBank) {  in applyMappingImpl()
2448     const RegisterBank *SrcBank = MRI.getRegBankOrNull(SrcReg);  in applyMappingImpl()  local
2452     if (SrcBank && SrcBank == &AMDGPU::VGPRRegBank) {  in applyMappingImpl()
2718     const RegisterBank *SrcBank =  in applyMappingImpl()  local
2724         SrcBank != &AMDGPU::SGPRRegBank &&  in applyMappingImpl()
2725         SrcBank != &AMDGPU::VCCRegBank &&  in applyMappingImpl()
2742       extendLow32IntoHigh32(B, DefRegs[1], DefRegs[0], Opc, *SrcBank);  in applyMappingImpl()
2743       MRI.setRegBank(DstReg, *SrcBank);  in applyMappingImpl()
2754     if (SrcBank == &AMDGPU::VCCRegBank) {  in applyMappingImpl()
2762         SrcBank->getID() == AMDGPU::SGPRRegBankID;  in applyMappingImpl()
2775         extendLow32IntoHigh32(B, DefRegs[1], DefRegs[0], Opc, *SrcBank, true);  in applyMappingImpl()
2808     const RegisterBank *SrcBank =  in applyMappingImpl()  local
2835                                 SrcBank == &AMDGPU::SGPRRegBank;  in applyMappingImpl()
2882     MRI.setRegBank(CastSrc.getReg(0), *SrcBank);  in applyMappingImpl()
2996     const RegisterBank *SrcBank =  in applyMappingImpl()  local
3002     MRI.setRegBank(CastSrc.getReg(0), *SrcBank);  in applyMappingImpl()
3742     const RegisterBank *SrcBank = getRegBank(MI.getOperand(1).getReg(), MRI,  in getInstrMapping()  local
3744     assert(SrcBank && "src bank should have been assigned already");  in getInstrMapping()
3746       DstBank = SrcBank;  in getInstrMapping()
3750         cannotCopy(*DstBank, *SrcBank, TypeSize::getFixed(Size)))  in getInstrMapping()
4191     const RegisterBank *SrcBank = getRegBank(Src, MRI, *TRI);  in getInstrMapping()  local
4192     assert(SrcBank);  in getInstrMapping()
4193     switch (SrcBank->getID()) {  in getInstrMapping()
4205     OpdsMapping[1] = AMDGPU::getValueMappingSGPR64Only(SrcBank->getID(),  in getInstrMapping()
4259     unsigned SrcBank = CanUseSCC ? AMDGPU::SGPRRegBankID : AMDGPU::VGPRRegBankID;  in getInstrMapping()  local
4267     OpdsMapping[2] = AMDGPU::getValueMapping(SrcBank, Size);  in getInstrMapping()
4268     OpdsMapping[3] = AMDGPU::getValueMapping(SrcBank, Size);  in getInstrMapping()
4649       unsigned SrcBank = getRegBankID(SrcReg, MRI, AMDGPU::SGPRRegBankID);  in getInstrMapping()  local
4657       OpdsMapping[2] = AMDGPU::getValueMapping(SrcBank, SrcSize);  in getInstrMapping()