221 static bool isVectorRegisterBank(const RegisterBank &Bank) {  in isVectorRegisterBank()
668   const RegisterBank *Bank = getRegBank(Reg, *MRI, *TRI);  in split64BitValueForMapping()  local
707   const RegisterBank *Bank = getRegBank(Src, MRI, *TRI);  in buildReadFirstLane()  local
1019   const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI);  in constrainOpWithReadfirstlane()  local
2007                                    const RegisterBank &Bank) {  in constrainRegToBank()
3496     if (const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI)) {  in getMappingType()  local
3513     if (const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI)) {  in isSALUMapping()  local
3692   const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI);  in getRegBankID()  local
3702   unsigned Bank = getRegBankID(Reg, MRI, AMDGPU::SGPRRegBankID);  in getSGPROpMapping()  local
3801       const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI);  in getInstrMapping()  local
4023       if (const RegisterBank *Bank = getRegBank(Reg, MRI, *TRI)) {  in getInstrMapping()  local
4129     unsigned Bank = getMappingType(MRI, MI);  in getInstrMapping()  local
4174     unsigned Bank = getRegBankID(Src, MRI);  in getInstrMapping()  local
4315     unsigned Bank = getMappingType(MRI, MI);  in getInstrMapping()  local
4946       unsigned Bank = getRegBankID(MI.getOperand(2).getReg(), MRI,  in getInstrMapping()  local
4953       unsigned Bank = getRegBankID(MI.getOperand(2).getReg(), MRI,  in getInstrMapping()  local
4960       unsigned Bank =  in getInstrMapping()  local
5062       unsigned Bank = getRegBankID(MI.getOperand(2).getReg(), MRI,  in getInstrMapping()  local
5071       unsigned Bank = getRegBankID(MI.getOperand(1).getReg(), MRI,  in getInstrMapping()  local
5170     unsigned Bank = SGPRSrcs && CondBank == AMDGPU::SGPRRegBankID ?  in getInstrMapping()  local
5242     unsigned Bank = getRegBankID(MI.getOperand(0).getReg(), MRI,  in getInstrMapping()  local