Lines Matching refs:getReg
588 const LLT PointerTy = MRI.getType(MO.getReg()); in castBufferRsrcFromV4I32()
606 B.buildExtractVectorElementConstant(S32, VectorReg, I).getReg(0); in castBufferRsrcFromV4I32()
637 PointerParts.push_back(Unmerged.getReg(I)); in castBufferRsrcToV4I32()
638 return B.buildBuildVector(VectorTy, PointerParts).getReg(0); in castBufferRsrcToV4I32()
640 Register Scalar = B.buildPtrToInt(ScalarTy, Pointer).getReg(0); in castBufferRsrcToV4I32()
641 return B.buildBitcast(VectorTy, Scalar).getReg(0); in castBufferRsrcToV4I32()
648 const LLT PointerTy = B.getMRI()->getType(MO.getReg()); in castBufferRsrcArgToV4I32()
652 MO.setReg(castBufferRsrcToV4I32(MO.getReg(), B)); in castBufferRsrcArgToV4I32()
2219 return B.buildUnmerge(S32, Dst).getReg(1); in getSegmentAperture()
2251 B.buildConstant(LLT::scalar(64), Offset).getReg(0)); in getSegmentAperture()
2253 return B.buildLoad(S32, LoadAddr, *MMO).getReg(0); in getSegmentAperture()
2273 B.buildConstant(LLT::scalar(64), StructOffset).getReg(0)); in getSegmentAperture()
2274 return B.buildLoad(S32, LoadAddr, *MMO).getReg(0); in getSegmentAperture()
2310 Register Dst = MI.getOperand(0).getReg(); in legalizeAddrSpaceCast()
2311 Register Src = isa<GIntrinsic>(MI) ? MI.getOperand(2).getReg() in legalizeAddrSpaceCast()
2312 : MI.getOperand(1).getReg(); in legalizeAddrSpaceCast()
2351 B.buildICmp(CmpInst::ICMP_NE, LLT::scalar(1), Src, FlatNull.getReg(0)); in legalizeAddrSpaceCast()
2352 B.buildSelect(Dst, CmpRes, PtrLo32, SegmentNull.getReg(0)); in legalizeAddrSpaceCast()
2366 Register SrcAsInt = B.buildPtrToInt(S32, Src).getReg(0); in legalizeAddrSpaceCast()
2384 SegmentNull.getReg(0)); in legalizeAddrSpaceCast()
2424 Register Src = MI.getOperand(1).getReg(); in legalizeFroundeven()
2442 B.buildSelect(MI.getOperand(0).getReg(), Cond, Src, Tmp2); in legalizeFroundeven()
2454 Register Src = MI.getOperand(1).getReg(); in legalizeFceil()
2471 B.buildFAdd(MI.getOperand(0).getReg(), Trunc, Add); in legalizeFceil()
2479 Register DstReg = MI.getOperand(0).getReg(); in legalizeFrem()
2480 Register Src0Reg = MI.getOperand(1).getReg(); in legalizeFrem()
2481 Register Src1Reg = MI.getOperand(2).getReg(); in legalizeFrem()
2504 .addUse(Const0.getReg(0)) in extractF64Exponent()
2505 .addUse(Const1.getReg(0)); in extractF64Exponent()
2517 Register Src = MI.getOperand(1).getReg(); in legalizeIntrinsicTrunc()
2522 Register Hi = Unmerge.getReg(1); in legalizeIntrinsicTrunc()
2550 B.buildSelect(MI.getOperand(0).getReg(), ExpGt51, Src, Tmp1); in legalizeIntrinsicTrunc()
2559 Register Dst = MI.getOperand(0).getReg(); in legalizeITOFP()
2560 Register Src = MI.getOperand(1).getReg(); in legalizeITOFP()
2571 auto CvtHi = Signed ? B.buildSITOFP(S64, Unmerge.getReg(1)) in legalizeITOFP()
2572 : B.buildUITOFP(S64, Unmerge.getReg(1)); in legalizeITOFP()
2574 auto CvtLo = B.buildUITOFP(S64, Unmerge.getReg(0)); in legalizeITOFP()
2590 auto X = B.buildXor(S32, Unmerge.getReg(0), Unmerge.getReg(1)); in legalizeITOFP()
2594 .addUse(Unmerge.getReg(1)); in legalizeITOFP()
2598 ShAmt = B.buildCTLZ(S32, Unmerge.getReg(1)); in legalizeITOFP()
2601 auto Adjust = B.buildUMin(S32, One, Unmerge2.getReg(0)); in legalizeITOFP()
2602 auto Norm2 = B.buildOr(S32, Unmerge2.getReg(1), Adjust); in legalizeITOFP()
2617 Register Dst = MI.getOperand(0).getReg(); in legalizeFPTOI()
2618 Register Src = MI.getOperand(1).getReg(); in legalizeFPTOI()
2708 Register Dst = MI.getOperand(0).getReg(); in legalizeExtractVectorElt()
2709 Register Vec = MI.getOperand(1).getReg(); in legalizeExtractVectorElt()
2736 getIConstantVRegValWithLookThrough(MI.getOperand(2).getReg(), MRI); in legalizeExtractVectorElt()
2743 B.buildCopy(Dst, Unmerge.getReg(IdxVal)); in legalizeExtractVectorElt()
2759 Register Dst = MI.getOperand(0).getReg(); in legalizeInsertVectorElt()
2760 Register Vec = MI.getOperand(1).getReg(); in legalizeInsertVectorElt()
2761 Register Ins = MI.getOperand(2).getReg(); in legalizeInsertVectorElt()
2790 getIConstantVRegValWithLookThrough(MI.getOperand(3).getReg(), MRI); in legalizeInsertVectorElt()
2803 SrcRegs[IdxVal] = MI.getOperand(2).getReg(); in legalizeInsertVectorElt()
2817 Register DstReg = MI.getOperand(0).getReg(); in legalizeSinCos()
2818 Register SrcReg = MI.getOperand(1).getReg(); in legalizeSinCos()
2827 .addUse(MulVal.getReg(0)) in legalizeSinCos()
2829 .getReg(0); in legalizeSinCos()
2831 TrigVal = B.buildFMul(Ty, SrcReg, OneOver2Pi, Flags).getReg(0); in legalizeSinCos()
2953 Register DstReg = MI.getOperand(0).getReg(); in legalizeGlobalValue()
3070 Register PtrReg = MI.getOperand(1).getReg(); in legalizeLoad()
3078 MI.getOperand(1).setReg(Cast.getReg(0)); in legalizeLoad()
3086 Register ValReg = MI.getOperand(0).getReg(); in legalizeLoad()
3128 WideLoad = B.buildLoadFromOffset(WideTy, PtrReg, *MMO, 0).getReg(0); in legalizeLoad()
3129 B.buildTrunc(ValReg, WideLoad).getReg(0); in legalizeLoad()
3136 WideLoad = B.buildLoadFromOffset(WideTy, PtrReg, *MMO, 0).getReg(0); in legalizeLoad()
3141 WideLoad = B.buildLoadFromOffset(WideTy, PtrReg, *MMO, 0).getReg(0); in legalizeLoad()
3159 Register DataReg = MI.getOperand(0).getReg(); in legalizeStore()
3174 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in legalizeFMad()
3197 Register DstReg = MI.getOperand(0).getReg(); in legalizeAtomicCmpXChg()
3198 Register PtrReg = MI.getOperand(1).getReg(); in legalizeAtomicCmpXChg()
3199 Register CmpVal = MI.getOperand(2).getReg(); in legalizeAtomicCmpXChg()
3200 Register NewVal = MI.getOperand(3).getReg(); in legalizeAtomicCmpXChg()
3208 Register PackedVal = B.buildBuildVector(VecTy, { NewVal, CmpVal }).getReg(0); in legalizeAtomicCmpXChg()
3236 if (DefMI->getOperand(0).getReg() == Src) in valueIsKnownNeverF32Denorm()
3241 return MRI.getType(DefMI->getOperand(1).getReg()) == LLT::scalar(16); in valueIsKnownNeverF32Denorm()
3282 return {ScaledInput.getReg(0), IsLtSmallestNormal.getReg(0)}; in getScaledLogInput()
3293 Register Dst = MI.getOperand(0).getReg(); in legalizeFlog2()
3294 Register Src = MI.getOperand(1).getReg(); in legalizeFlog2()
3303 .addUse(Ext.getReg(0)) in legalizeFlog2()
3338 return B.buildFAdd(Ty, FMul, Z, Flags).getReg(0); in getMad()
3347 Register Dst = MI.getOperand(0).getReg(); in legalizeFlogCommon()
3348 Register X = MI.getOperand(1).getReg(); in legalizeFlogCommon()
3364 legalizeFlogUnsafe(B, LogVal, PromoteSrc.getReg(0), IsLog10, Flags); in legalizeFlogCommon()
3394 R = B.buildFMul(Ty, Y, C, Flags).getReg(0); in legalizeFlogCommon()
3398 R = B.buildFAdd(Ty, R, FMA1, Flags).getReg(0); in legalizeFlogCommon()
3417 getMad(B, Ty, YH.getReg(0), CT.getReg(0), YTCT.getReg(0), Flags); in legalizeFlogCommon()
3418 Register Mad1 = getMad(B, Ty, YT.getReg(0), CH.getReg(0), Mad0, Flags); in legalizeFlogCommon()
3419 R = getMad(B, Ty, YH.getReg(0), CH.getReg(0), Mad1, Flags); in legalizeFlogCommon()
3432 R = B.buildSelect(Ty, IsFinite, R, Y, Flags).getReg(0); in legalizeFlogCommon()
3495 Register Dst = MI.getOperand(0).getReg(); in legalizeFExp2()
3496 Register Src = MI.getOperand(1).getReg(); in legalizeFExp2()
3506 .addUse(Ext.getReg(0)) in legalizeFExp2()
3537 .addUse(AddInput.getReg(0)) in legalizeFExp2()
3559 .addUse(Mul.getReg(0)) in legalizeFExpUnsafe()
3562 B.buildFExp2(Dst, Mul.getReg(0), Flags); in legalizeFExpUnsafe()
3579 .addUse(ExpInput.getReg(0)) in legalizeFExpUnsafe()
3590 Register Dst = MI.getOperand(0).getReg(); in legalizeFExp()
3591 Register X = MI.getOperand(1).getReg(); in legalizeFExp()
3615 legalizeFExpUnsafe(B, Lowered, Ext.getReg(0), Flags); in legalizeFExp()
3665 PH = B.buildFMul(Ty, X, C, Flags).getReg(0); in legalizeFExp()
3670 PL = B.buildFMA(Ty, X, CC, FMA0, Flags).getReg(0); in legalizeFExp()
3683 PH = B.buildFMul(Ty, XH, CH, Flags).getReg(0); in legalizeFExp()
3689 getMad(B, Ty, XL.getReg(0), CH.getReg(0), XLCL.getReg(0), Flags); in legalizeFExp()
3690 PL = getMad(B, Ty, XH.getReg(0), CL.getReg(0), Mad0, Flags); in legalizeFExp()
3701 .addUse(A.getReg(0)) in legalizeFExp()
3732 Register Dst = MI.getOperand(0).getReg(); in legalizeFPow()
3733 Register Src0 = MI.getOperand(1).getReg(); in legalizeFPow()
3734 Register Src1 = MI.getOperand(2).getReg(); in legalizeFPow()
3743 .addUse(Log.getReg(0)) in legalizeFPow()
3753 .addUse(Ext0.getReg(0)) in legalizeFPow()
3754 .addUse(Ext1.getReg(0)) in legalizeFPow()
3768 ModSrc = SrcFNeg->getOperand(1).getReg(); in stripAnySourceMods()
3770 ModSrc = SrcFAbs->getOperand(1).getReg(); in stripAnySourceMods()
3772 ModSrc = SrcFAbs->getOperand(1).getReg(); in stripAnySourceMods()
3782 Register Dst = MI.getOperand(0).getReg(); in legalizeFFloor()
3783 Register OrigSrc = MI.getOperand(1).getReg(); in legalizeFFloor()
3823 CorrectedFract = B.buildSelect(F64, IsNan, ModSrc, Min, Flags).getReg(0); in legalizeFFloor()
3837 Register Dst = MI.getOperand(0).getReg(); in legalizeBuildVector()
3842 Register Src0 = MI.getOperand(1).getReg(); in legalizeBuildVector()
3843 Register Src1 = MI.getOperand(2).getReg(); in legalizeBuildVector()
3847 Src0 = B.buildTrunc(S16, MI.getOperand(1).getReg()).getReg(0); in legalizeBuildVector()
3848 Src1 = B.buildTrunc(S16, MI.getOperand(2).getReg()).getReg(0); in legalizeBuildVector()
3889 Zero32 = B.buildConstant(S32, 0).getReg(0); in buildMultiply()
3894 Zero64 = B.buildConstant(S64, 0).getReg(0); in buildMultiply()
3917 LocalAccum = B.buildZExt(S32, CarryIn[0]).getReg(0); in buildMultiply()
3923 CarryAccum = B.buildZExt(S32, CarryIn[0]).getReg(0); in buildMultiply()
3927 .getReg(0); in buildMultiply()
3938 LocalAccum = Add.getReg(0); in buildMultiply()
3939 return HaveCarryOut ? Add.getReg(1) : Register(); in buildMultiply()
3974 LocalAccum[0] = Mul.getReg(0); in buildMultiply()
3977 LocalAccum[0] = B.buildAdd(S32, LocalAccum[0], Mul).getReg(0); in buildMultiply()
3981 .getReg(0); in buildMultiply()
3996 Tmp = B.buildAnyExt(S64, LocalAccum[0]).getReg(0); in buildMultiply()
3999 Tmp = B.buildMergeLikeInstr(S64, LocalAccum).getReg(0); in buildMultiply()
4002 Tmp = B.buildZExt(S64, LocalAccum[0]).getReg(0); in buildMultiply()
4019 Tmp = Mad.getReg(0); in buildMultiply()
4021 CarryOut.push_back(Mad.getReg(1)); in buildMultiply()
4028 LocalAccum[0] = Unmerge.getReg(0); in buildMultiply()
4030 LocalAccum[1] = Unmerge.getReg(1); in buildMultiply()
4092 Accum[2 * i - 1] = Lo->getOperand(0).getReg(); in buildMultiply()
4096 Lo->getOperand(1).getReg()); in buildMultiply()
4097 Accum[2 * i] = Hi.getReg(0); in buildMultiply()
4098 SeparateOddCarry = Hi.getReg(1); in buildMultiply()
4128 Register DstReg = MI.getOperand(0).getReg(); in legalizeMul()
4129 Register Src0 = MI.getOperand(1).getReg(); in legalizeMul()
4130 Register Src1 = MI.getOperand(2).getReg(); in legalizeMul()
4174 Register Dst = MI.getOperand(0).getReg(); in legalizeCTLZ_CTTZ()
4175 Register Src = MI.getOperand(1).getReg(); in legalizeCTLZ_CTTZ()
4192 Register Dst = MI.getOperand(0).getReg(); in legalizeCTLZ_ZERO_UNDEF()
4193 Register Src = MI.getOperand(1).getReg(); in legalizeCTLZ_ZERO_UNDEF()
4200 auto Extend = B.buildAnyExt(S32, {Src}).getReg(0u); in legalizeCTLZ_ZERO_UNDEF()
4212 auto ConstVal = getIConstantVRegSExtVal(MI.getOperand(2).getReg(), MRI); in isNot()
4220 Register CondDef = MI.getOperand(0).getReg(); in verifyCFIntrinsic()
4228 Register NegatedCond = UseMI->getOperand(0).getReg(); in verifyCFIntrinsic()
4281 AndMaskSrc = B.buildLShr(S32, LiveIn, ShiftAmt).getReg(0); in loadInputValue()
4359 if (!loadInputValue(MI.getOperand(0).getReg(), B, ArgType)) in legalizePreloadedArgIntrin()
4368 B.buildConstant(MI.getOperand(0).getReg(), C); in replaceWithConstant()
4386 Register DstReg = MI.getOperand(0).getReg(); in legalizeWorkitemIDIntrinsic()
4426 return B.buildPtrAdd(PtrTy, KernArgReg, COffset).getReg(0); in getKernargParameterPtr()
4435 Register DstReg = MI.getOperand(0).getReg(); in legalizeKernargMemParameter()
4452 Register Dst = MI.getOperand(0).getReg(); in legalizeFDIV()
4529 auto CvtLo = B.buildUITOFP(S32, Unmerge.getReg(0)); in emitReciprocalU64()
4530 auto CvtHi = B.buildUITOFP(S32, Unmerge.getReg(1)); in emitReciprocalU64()
4553 return {ResultLo.getReg(0), ResultHi.getReg(0)}; in emitReciprocalU64()
4577 Register MulHi1_Lo = UnmergeMulHi1.getReg(0); in legalizeUnsignedDIV_REM64Impl()
4578 Register MulHi1_Hi = UnmergeMulHi1.getReg(1); in legalizeUnsignedDIV_REM64Impl()
4581 auto Add1_Hi = B.buildUAdde(S32, S1, RcpHi, MulHi1_Hi, Add1_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
4587 Register MulHi2_Lo = UnmergeMulHi2.getReg(0); in legalizeUnsignedDIV_REM64Impl()
4588 Register MulHi2_Hi = UnmergeMulHi2.getReg(1); in legalizeUnsignedDIV_REM64Impl()
4592 auto Add2_Hi = B.buildUAdde(S32, S1, Add1_Hi, MulHi2_Hi, Add2_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
4596 Register NumerLo = UnmergeNumer.getReg(0); in legalizeUnsignedDIV_REM64Impl()
4597 Register NumerHi = UnmergeNumer.getReg(1); in legalizeUnsignedDIV_REM64Impl()
4602 Register Mul3_Lo = UnmergeMul3.getReg(0); in legalizeUnsignedDIV_REM64Impl()
4603 Register Mul3_Hi = UnmergeMul3.getReg(1); in legalizeUnsignedDIV_REM64Impl()
4605 auto Sub1_Hi = B.buildUSube(S32, S1, NumerHi, Mul3_Hi, Sub1_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
4610 Register DenomLo = UnmergeDenom.getReg(0); in legalizeUnsignedDIV_REM64Impl()
4611 Register DenomHi = UnmergeDenom.getReg(1); in legalizeUnsignedDIV_REM64Impl()
4628 auto Sub2_Mi = B.buildUSube(S32, S1, Sub1_Mi, DenomHi, Sub1_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
4629 auto Sub2_Hi = B.buildUSube(S32, S1, Sub2_Mi, Zero32, Sub2_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
4646 auto Sub3_Mi = B.buildUSube(S32, S1, Sub2_Mi, DenomHi, Sub2_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
4647 auto Sub3_Hi = B.buildUSube(S32, S1, Sub3_Mi, Zero32, Sub3_Lo.getReg(1)); in legalizeUnsignedDIV_REM64Impl()
4676 DstDivReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
4680 DstRemReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
4684 DstDivReg = MI.getOperand(0).getReg(); in legalizeUnsignedDIV_REM()
4685 DstRemReg = MI.getOperand(1).getReg(); in legalizeUnsignedDIV_REM()
4693 Register Num = MI.getOperand(FirstSrcOpIdx).getReg(); in legalizeUnsignedDIV_REM()
4694 Register Den = MI.getOperand(FirstSrcOpIdx + 1).getReg(); in legalizeUnsignedDIV_REM()
4695 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in legalizeUnsignedDIV_REM()
4714 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in legalizeSignedDIV_REM()
4719 Register LHS = MI.getOperand(FirstSrcOpIdx).getReg(); in legalizeSignedDIV_REM()
4720 Register RHS = MI.getOperand(FirstSrcOpIdx + 1).getReg(); in legalizeSignedDIV_REM()
4726 LHS = B.buildAdd(Ty, LHS, LHSign).getReg(0); in legalizeSignedDIV_REM()
4727 RHS = B.buildAdd(Ty, RHS, RHSign).getReg(0); in legalizeSignedDIV_REM()
4729 LHS = B.buildXor(Ty, LHS, LHSign).getReg(0); in legalizeSignedDIV_REM()
4730 RHS = B.buildXor(Ty, RHS, RHSign).getReg(0); in legalizeSignedDIV_REM()
4737 DstDivReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
4742 DstRemReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
4747 DstDivReg = MI.getOperand(0).getReg(); in legalizeSignedDIV_REM()
4748 DstRemReg = MI.getOperand(1).getReg(); in legalizeSignedDIV_REM()
4761 auto Sign = B.buildXor(Ty, LHSign, RHSign).getReg(0); in legalizeSignedDIV_REM()
4762 auto SignXor = B.buildXor(Ty, TmpDivReg, Sign).getReg(0); in legalizeSignedDIV_REM()
4767 auto Sign = LHSign.getReg(0); // Remainder sign is the same as LHS in legalizeSignedDIV_REM()
4768 auto SignXor = B.buildXor(Ty, TmpRemReg, Sign).getReg(0); in legalizeSignedDIV_REM()
4779 Register Res = MI.getOperand(0).getReg(); in legalizeFastUnsafeFDIV()
4780 Register LHS = MI.getOperand(1).getReg(); in legalizeFastUnsafeFDIV()
4781 Register RHS = MI.getOperand(2).getReg(); in legalizeFastUnsafeFDIV()
4814 .addUse(FNeg.getReg(0)) in legalizeFastUnsafeFDIV()
4841 Register Res = MI.getOperand(0).getReg(); in legalizeFastUnsafeFDIV64()
4842 Register X = MI.getOperand(1).getReg(); in legalizeFastUnsafeFDIV64()
4843 Register Y = MI.getOperand(2).getReg(); in legalizeFastUnsafeFDIV64()
4881 Register Res = MI.getOperand(0).getReg(); in legalizeFDIV16()
4882 Register LHS = MI.getOperand(1).getReg(); in legalizeFDIV16()
4883 Register RHS = MI.getOperand(2).getReg(); in legalizeFDIV16()
4894 .addUse(RHSExt.getReg(0)) in legalizeFDIV16()
4901 .addUse(RDst.getReg(0)) in legalizeFDIV16()
4943 Register Res = MI.getOperand(0).getReg(); in legalizeFDIV32()
4944 Register LHS = MI.getOperand(1).getReg(); in legalizeFDIV32()
4945 Register RHS = MI.getOperand(2).getReg(); in legalizeFDIV32()
4970 .addUse(DenominatorScaled.getReg(0)) in legalizeFDIV32()
5008 .addUse(Fma4.getReg(0)) in legalizeFDIV32()
5009 .addUse(Fma1.getReg(0)) in legalizeFDIV32()
5010 .addUse(Fma3.getReg(0)) in legalizeFDIV32()
5011 .addUse(NumeratorScaled.getReg(1)) in legalizeFDIV32()
5015 .addUse(Fmas.getReg(0)) in legalizeFDIV32()
5030 Register Res = MI.getOperand(0).getReg(); in legalizeFDIV64()
5031 Register LHS = MI.getOperand(1).getReg(); in legalizeFDIV64()
5032 Register RHS = MI.getOperand(2).getReg(); in legalizeFDIV64()
5047 auto NegDivScale0 = B.buildFNeg(S64, DivScale0.getReg(0), Flags); in legalizeFDIV64()
5050 .addUse(DivScale0.getReg(0)) in legalizeFDIV64()
5064 auto Mul = B.buildFMul(S64, DivScale1.getReg(0), Fma3, Flags); in legalizeFDIV64()
5065 auto Fma4 = B.buildFMA(S64, NegDivScale0, Mul, DivScale1.getReg(0), Flags); in legalizeFDIV64()
5079 auto CmpNum = B.buildICmp(ICmpInst::ICMP_EQ, S1, NumUnmerge.getReg(1), in legalizeFDIV64()
5080 Scale1Unmerge.getReg(1)); in legalizeFDIV64()
5081 auto CmpDen = B.buildICmp(ICmpInst::ICMP_EQ, S1, DenUnmerge.getReg(1), in legalizeFDIV64()
5082 Scale0Unmerge.getReg(1)); in legalizeFDIV64()
5083 Scale = B.buildXor(S1, CmpNum, CmpDen).getReg(0); in legalizeFDIV64()
5085 Scale = DivScale1.getReg(1); in legalizeFDIV64()
5089 .addUse(Fma4.getReg(0)) in legalizeFDIV64()
5090 .addUse(Fma3.getReg(0)) in legalizeFDIV64()
5091 .addUse(Mul.getReg(0)) in legalizeFDIV64()
5096 .addUse(Fmas.getReg(0)) in legalizeFDIV64()
5108 Register Res0 = MI.getOperand(0).getReg(); in legalizeFFREXP()
5109 Register Res1 = MI.getOperand(1).getReg(); in legalizeFFREXP()
5110 Register Val = MI.getOperand(2).getReg(); in legalizeFFREXP()
5143 Register Res = MI.getOperand(0).getReg(); in legalizeFDIVFastIntrin()
5144 Register LHS = MI.getOperand(2).getReg(); in legalizeFDIVFastIntrin()
5145 Register RHS = MI.getOperand(3).getReg(); in legalizeFDIVFastIntrin()
5164 .addUse(Mul0.getReg(0)) in legalizeFDIVFastIntrin()
5185 .addUse(Ext.getReg(0)) in legalizeFSQRTF16()
5196 Register Dst = MI.getOperand(0).getReg(); in legalizeFSQRTF32()
5197 Register X = MI.getOperand(1).getReg(); in legalizeFSQRTF32()
5220 .addUse(SqrtX.getReg(0)) in legalizeFSQRTF32()
5239 B.buildSelect(F32, SqrtVPLE0, SqrtSNextDown, SqrtS, Flags).getReg(0); in legalizeFSQRTF32()
5243 B.buildSelect(F32, SqrtVPVSGT0, SqrtSNextUp, SqrtS, Flags).getReg(0); in legalizeFSQRTF32()
5246 B.buildIntrinsic(Intrinsic::amdgcn_rsq, {F32}).addReg(SqrtX.getReg(0)); in legalizeFSQRTF32()
5254 SqrtS = B.buildFMA(F32, SqrtS, SqrtE, SqrtS, Flags).getReg(0); in legalizeFSQRTF32()
5257 SqrtS = B.buildFMA(F32, SqrtD, SqrtH, SqrtS, Flags).getReg(0); in legalizeFSQRTF32()
5264 SqrtS = B.buildSelect(F32, NeedScale, ScaledDown, SqrtS, Flags).getReg(0); in legalizeFSQRTF32()
5300 Register Dst = MI.getOperand(0).getReg(); in legalizeFSQRTF64()
5303 Register X = MI.getOperand(1).getReg(); in legalizeFSQRTF64()
5317 B.buildIntrinsic(Intrinsic::amdgcn_rsq, {F64}).addReg(SqrtX.getReg(0)); in legalizeFSQRTF64()
5360 LLT Ty = MRI.getType(MI.getOperand(0).getReg()); in legalizeFSQRT()
5382 Register Dst = MI.getOperand(0).getReg(); in legalizeRsqClampIntrinsic()
5383 Register Src = MI.getOperand(2).getReg(); in legalizeRsqClampIntrinsic()
5436 return LaneOp.getReg(0); in legalizeLaneOp()
5438 return LaneOp.addUse(Src1).getReg(0); in legalizeLaneOp()
5440 return LaneOp.addUse(Src1).addUse(Src2).getReg(0); in legalizeLaneOp()
5443 Register Src3 = MI.getOperand(5).getReg(); in legalizeLaneOp()
5451 .getReg(0); in legalizeLaneOp()
5458 Register DstReg = MI.getOperand(0).getReg(); in legalizeLaneOp()
5459 Register Src0 = MI.getOperand(2).getReg(); in legalizeLaneOp()
5463 Src1 = MI.getOperand(3).getReg(); in legalizeLaneOp()
5465 Src2 = MI.getOperand(4).getReg(); in legalizeLaneOp()
5478 Src0 = B.buildAnyExt(S32, Src0).getReg(0); in legalizeLaneOp()
5481 Src1 = B.buildAnyExt(LLT::scalar(32), Src1).getReg(0); in legalizeLaneOp()
5484 Src2 = B.buildAnyExt(LLT::scalar(32), Src2).getReg(0); in legalizeLaneOp()
5523 Src0 = Src0Parts.getReg(i); in legalizeLaneOp()
5526 Src1 = Src1Parts.getReg(i); in legalizeLaneOp()
5529 Src2 = Src2Parts.getReg(i); in legalizeLaneOp()
5554 B.buildPtrAdd(DstReg, KernargPtrReg, B.buildConstant(IdxTy, Offset).getReg(0)); in getImplicitArgPtr()
5564 Register Result = MI.getOperand(0).getReg(); in legalizePointerAsRsrcIntrin()
5565 Register Pointer = MI.getOperand(2).getReg(); in legalizePointerAsRsrcIntrin()
5566 Register Stride = MI.getOperand(3).getReg(); in legalizePointerAsRsrcIntrin()
5567 Register NumRecords = MI.getOperand(4).getReg(); in legalizePointerAsRsrcIntrin()
5568 Register Flags = MI.getOperand(5).getReg(); in legalizePointerAsRsrcIntrin()
5574 Register LowHalf = Unmerge.getReg(0); in legalizePointerAsRsrcIntrin()
5575 Register HighHalf = Unmerge.getReg(1); in legalizePointerAsRsrcIntrin()
5596 Register NewHighHalfReg = NewHighHalf.getReg(0); in legalizePointerAsRsrcIntrin()
5611 Register DstReg = MI.getOperand(0).getReg(); in legalizeImplicitArgPtr()
5640 Register DstReg = MI.getOperand(0).getReg(); in legalizeLDSKernelId()
5653 auto Unmerge = B.buildUnmerge(LLT::scalar(32), MI.getOperand(2).getReg()); in legalizeIsAddrSpace()
5654 Register Hi32 = Unmerge.getReg(1); in legalizeIsAddrSpace()
5681 BaseReg = B.buildPtrToInt(MRI.getType(OrigOffset), BaseReg).getReg(0); in splitBufferOffsets()
5700 BaseReg = B.buildConstant(S32, Overflow).getReg(0); in splitBufferOffsets()
5703 BaseReg = B.buildAdd(S32, BaseReg, OverflowVal).getReg(0); in splitBufferOffsets()
5708 BaseReg = B.buildConstant(S32, 0).getReg(0); in splitBufferOffsets()
5728 WideRegs.push_back(B.buildAnyExt(S32, Unmerge.getReg(I)).getReg(0)); in handleD16VData()
5733 .getReg(0); in handleD16VData()
5739 Reg = B.buildBitcast(S32, Reg).getReg(0); in handleD16VData()
5741 PackedRegs.resize(2, B.buildUndef(S32).getReg(0)); in handleD16VData()
5743 .getReg(0); in handleD16VData()
5750 PackedRegs.push_back(Unmerge.getReg(I)); in handleD16VData()
5751 PackedRegs.resize(6, B.buildUndef(S16).getReg(0)); in handleD16VData()
5752 Reg = B.buildBuildVector(LLT::fixed_vector(6, S16), PackedRegs).getReg(0); in handleD16VData()
5753 return B.buildBitcast(LLT::fixed_vector(3, S32), Reg).getReg(0); in handleD16VData()
5758 Reg = B.buildBitcast(LLT::fixed_vector(2, S32), Reg).getReg(0); in handleD16VData()
5761 PackedRegs.push_back(Unmerge.getReg(I)); in handleD16VData()
5762 PackedRegs.resize(4, B.buildUndef(S32).getReg(0)); in handleD16VData()
5764 .getReg(0); in handleD16VData()
5772 .getReg(0); in handleD16VData()
5790 Register AnyExt = B.buildAnyExt(LLT::scalar(32), VData).getReg(0); in fixStoreSourceType()
5809 Register VData = MI.getOperand(1).getReg(); in legalizeBufferStore()
5817 Register RSrc = MI.getOperand(2).getReg(); in legalizeBufferStore()
5832 VIndex = MI.getOperand(3).getReg(); in legalizeBufferStore()
5835 VIndex = B.buildConstant(S32, 0).getReg(0); in legalizeBufferStore()
5838 Register VOffset = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferStore()
5839 Register SOffset = MI.getOperand(4 + OpOffset).getReg(); in legalizeBufferStore()
5922 Register Dst = MI.getOperand(0).getReg(); in legalizeBufferLoad()
5929 StatusDst = MI.getOperand(1).getReg(); in legalizeBufferLoad()
5934 Register RSrc = MI.getOperand(2 + OpOffset).getReg(); in legalizeBufferLoad()
5943 VIndex = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferLoad()
5946 VIndex = B.buildConstant(S32, 0).getReg(0); in legalizeBufferLoad()
5949 Register VOffset = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferLoad()
5950 Register SOffset = MI.getOperand(4 + OpOffset).getReg(); in legalizeBufferLoad()
5966 Dst = MI.getOperand(0).getReg(); in legalizeBufferLoad()
6047 Repack.push_back(B.buildTrunc(EltTy, Unmerge.getReg(I)).getReg(0)); in legalizeBufferLoad()
6157 Register Dst = MI.getOperand(0).getReg(); in legalizeBufferAtomic()
6160 Register VData = MI.getOperand(2).getReg(); in legalizeBufferAtomic()
6166 CmpVal = MI.getOperand(3).getReg(); in legalizeBufferAtomic()
6171 Register RSrc = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferAtomic()
6178 VIndex = MI.getOperand(4 + OpOffset).getReg(); in legalizeBufferAtomic()
6181 VIndex = B.buildConstant(LLT::scalar(32), 0).getReg(0); in legalizeBufferAtomic()
6184 Register VOffset = MI.getOperand(4 + OpOffset).getReg(); in legalizeBufferAtomic()
6185 Register SOffset = MI.getOperand(5 + OpOffset).getReg(); in legalizeBufferAtomic()
6229 Register AddrReg = SrcOp.getReg(); in packImage16bitOpsToDwords()
6240 B.buildBuildVector(V2S16, {AddrReg, B.buildUndef(S16).getReg(0)}) in packImage16bitOpsToDwords()
6241 .getReg(0)); in packImage16bitOpsToDwords()
6246 AddrReg = B.buildBitcast(V2S16, AddrReg).getReg(0); in packImage16bitOpsToDwords()
6261 B.buildBuildVector(V2S16, {AddrReg, B.buildUndef(S16).getReg(0)}) in packImage16bitOpsToDwords()
6262 .getReg(0)); in packImage16bitOpsToDwords()
6266 V2S16, {AddrReg, MI.getOperand(ArgOffset + I + 1).getReg()}) in packImage16bitOpsToDwords()
6267 .getReg(0)); in packImage16bitOpsToDwords()
6284 AddrRegs.push_back(SrcOp.getReg()); in convertImageAddrToPacked()
6285 assert(B.getMRI()->getType(SrcOp.getReg()) == S32); in convertImageAddrToPacked()
6293 MI.getOperand(DimIdx).setReg(VAddr.getReg(0)); in convertImageAddrToPacked()
6341 VData = MI.getOperand(NumDefs == 0 ? 1 : 0).getReg(); in legalizeImageIntrinsic()
6351 MRI->getType(MI.getOperand(ArgOffset + Intr->GradientStart).getReg()); in legalizeImageIntrinsic()
6353 MRI->getType(MI.getOperand(ArgOffset + Intr->CoordStart).getReg()); in legalizeImageIntrinsic()
6399 Register VData0 = MI.getOperand(2).getReg(); in legalizeImageIntrinsic()
6407 Register VData1 = MI.getOperand(3).getReg(); in legalizeImageIntrinsic()
6411 MI.getOperand(2).setReg(Concat.getReg(0)); in legalizeImageIntrinsic()
6453 PackedRegs[NSAMaxSize - 1] = Concat.getReg(0); in legalizeImageIntrinsic()
6458 PackedRegs[0] = Concat.getReg(0); in legalizeImageIntrinsic()
6470 assert(SrcOp.getReg() != AMDGPU::NoRegister); in legalizeImageIntrinsic()
6528 Register DstReg = MI.getOperand(0).getReg(); in legalizeImageIntrinsic()
6603 Dst1Reg = MI.getOperand(1).getReg(); in legalizeImageIntrinsic()
6661 Reg = B.buildBitcast(V2S16, Reg).getReg(0); in legalizeImageIntrinsic()
6664 Reg = B.buildTrunc(S16, Reg).getReg(0); in legalizeImageIntrinsic()
6671 Register Undef = B.buildUndef(Ty).getReg(0); in legalizeImageIntrinsic()
6695 NewResultReg = B.buildConcatVectors(V4S16, ResultRegs).getReg(0); in legalizeImageIntrinsic()
6720 Register OrigDst = MI.getOperand(0).getReg(); in legalizeSBufferLoad()
6861 B.buildConstant(LLT::scalar(64), Offset).getReg(0)); in legalizeTrapHsaQueuePtr()
6863 Register Temp = B.buildLoad(S64, LoadAddr, *MMO).getReg(0); in legalizeTrapHsaQueuePtr()
6936 Register DstReg = MI.getOperand(0).getReg(); in legalizeBVHIntrinsic()
6937 Register NodePtr = MI.getOperand(2).getReg(); in legalizeBVHIntrinsic()
6938 Register RayExtent = MI.getOperand(3).getReg(); in legalizeBVHIntrinsic()
6939 Register RayOrigin = MI.getOperand(4).getReg(); in legalizeBVHIntrinsic()
6940 Register RayDir = MI.getOperand(5).getReg(); in legalizeBVHIntrinsic()
6941 Register RayInvDir = MI.getOperand(6).getReg(); in legalizeBVHIntrinsic()
6942 Register TDescr = MI.getOperand(7).getReg(); in legalizeBVHIntrinsic()
6988 V3S32, {Unmerge.getReg(0), Unmerge.getReg(1), Unmerge.getReg(2)}); in legalizeBVHIntrinsic()
6989 Ops.push_back(Merged.getReg(0)); in legalizeBVHIntrinsic()
7002 S32, B.buildMergeLikeInstr(V2S16, {UnmergeRayInvDir.getReg(0), in legalizeBVHIntrinsic()
7003 UnmergeRayDir.getReg(0)})) in legalizeBVHIntrinsic()
7004 .getReg(0), in legalizeBVHIntrinsic()
7006 S32, B.buildMergeLikeInstr(V2S16, {UnmergeRayInvDir.getReg(1), in legalizeBVHIntrinsic()
7007 UnmergeRayDir.getReg(1)})) in legalizeBVHIntrinsic()
7008 .getReg(0), in legalizeBVHIntrinsic()
7010 S32, B.buildMergeLikeInstr(V2S16, {UnmergeRayInvDir.getReg(2), in legalizeBVHIntrinsic()
7011 UnmergeRayDir.getReg(2)})) in legalizeBVHIntrinsic()
7012 .getReg(0)}); in legalizeBVHIntrinsic()
7013 Ops.push_back(MergedDir.getReg(0)); in legalizeBVHIntrinsic()
7021 Ops.push_back(Unmerge.getReg(0)); in legalizeBVHIntrinsic()
7022 Ops.push_back(Unmerge.getReg(1)); in legalizeBVHIntrinsic()
7030 Ops.push_back(Unmerge.getReg(0)); in legalizeBVHIntrinsic()
7031 Ops.push_back(Unmerge.getReg(1)); in legalizeBVHIntrinsic()
7032 Ops.push_back(Unmerge.getReg(2)); in legalizeBVHIntrinsic()
7043 {UnmergeRayDir.getReg(0), UnmergeRayDir.getReg(1)}); in legalizeBVHIntrinsic()
7045 R2, {UnmergeRayDir.getReg(2), UnmergeRayInvDir.getReg(0)}); in legalizeBVHIntrinsic()
7047 R3, {UnmergeRayInvDir.getReg(1), UnmergeRayInvDir.getReg(2)}); in legalizeBVHIntrinsic()
7060 Register MergedOps = B.buildMergeLikeInstr(OpTy, Ops).getReg(0); in legalizeBVHIntrinsic()
7094 .addDef(MI.getOperand(0).getReg()) in legalizeFPTruncRound()
7095 .addUse(MI.getOperand(1).getReg()); in legalizeFPTruncRound()
7106 Register DstReg = MI.getOperand(0).getReg(); in legalizeStackSave()
7118 Register DstReg = MI.getOperand(0).getReg(); in legalizeWaveID()
7136 Register Src = MI.getOperand(0).getReg(); in legalizeGetFPEnv()
7156 Register Src = MI.getOperand(0).getReg(); in legalizeSetFPEnv()
7164 .addReg(Unmerge.getReg(0)); in legalizeSetFPEnv()
7168 .addReg(Unmerge.getReg(1)); in legalizeSetFPEnv()
7191 Register Def = MI.getOperand(1).getReg(); in legalizeIntrinsic()
7192 Register Use = MI.getOperand(3).getReg(); in legalizeIntrinsic()
7240 Register Reg = MI.getOperand(2).getReg(); in legalizeIntrinsic()
7270 B.buildConstant(MI.getOperand(0).getReg(), 0); in legalizeIntrinsic()
7461 Register Index = MI.getOperand(5).getReg(); in legalizeIntrinsic()
7464 MI.getOperand(5).setReg(B.buildAnyExt(S32, Index).getReg(0)); in legalizeIntrinsic()
7470 Register Index = MI.getOperand(7).getReg(); in legalizeIntrinsic()
7473 MI.getOperand(7).setReg(B.buildAnyExt(S32, Index).getReg(0)); in legalizeIntrinsic()